文件名称:LCD1602_Verilog
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- 上传时间:2012-11-16
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文件大小:648.84kb
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lcd1602的verilog语言程序,对学习fpga有帮助,简单易上手!-lcd1602 the verilog language program, to learn fpga help, simple approachable!
相关搜索: lcd1602
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下载文件列表
LCD1602_Verilog/.sopc_builder/filters.xml
LCD1602_Verilog/Clock_Gen.v
LCD1602_Verilog/Clock_Gen.v.bak
LCD1602_Verilog/db/LCD_Top.(0).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(0).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.hdb
LCD1602_Verilog/db/LCD_Top.ace_cmp.bpm
LCD1602_Verilog/db/LCD_Top.ace_cmp.cdb
LCD1602_Verilog/db/LCD_Top.ace_cmp.ecobp
LCD1602_Verilog/db/LCD_Top.ace_cmp.hdb
LCD1602_Verilog/db/LCD_Top.asm.qmsg
LCD1602_Verilog/db/LCD_Top.cbx.xml
LCD1602_Verilog/db/LCD_Top.cmp.bpm
LCD1602_Verilog/db/LCD_Top.cmp.cdb
LCD1602_Verilog/db/LCD_Top.cmp.ecobp
LCD1602_Verilog/db/LCD_Top.cmp.hdb
LCD1602_Verilog/db/LCD_Top.cmp.kpt
LCD1602_Verilog/db/LCD_Top.cmp.logdb
LCD1602_Verilog/db/LCD_Top.cmp.rdb
LCD1602_Verilog/db/LCD_Top.cmp.tdb
LCD1602_Verilog/db/LCD_Top.cmp0.ddb
LCD1602_Verilog/db/LCD_Top.cmp_merge.kpt
LCD1602_Verilog/db/LCD_Top.db_info
LCD1602_Verilog/db/LCD_Top.eco.cdb
LCD1602_Verilog/db/LCD_Top.fit.qmsg
LCD1602_Verilog/db/LCD_Top.hier_info
LCD1602_Verilog/db/LCD_Top.hif
LCD1602_Verilog/db/LCD_Top.lpc.html
LCD1602_Verilog/db/LCD_Top.lpc.rdb
LCD1602_Verilog/db/LCD_Top.lpc.txt
LCD1602_Verilog/db/LCD_Top.map.bpm
LCD1602_Verilog/db/LCD_Top.map.cdb
LCD1602_Verilog/db/LCD_Top.map.ecobp
LCD1602_Verilog/db/LCD_Top.map.hdb
LCD1602_Verilog/db/LCD_Top.map.kpt
LCD1602_Verilog/db/LCD_Top.map.logdb
LCD1602_Verilog/db/LCD_Top.map.qmsg
LCD1602_Verilog/db/LCD_Top.map_bb.cdb
LCD1602_Verilog/db/LCD_Top.map_bb.hdb
LCD1602_Verilog/db/LCD_Top.map_bb.logdb
LCD1602_Verilog/db/LCD_Top.pre_map.cdb
LCD1602_Verilog/db/LCD_Top.pre_map.hdb
LCD1602_Verilog/db/LCD_Top.rtlv.hdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg.cdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg_swap.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.hdb
LCD1602_Verilog/db/LCD_Top.sld_design_entry.sci
LCD1602_Verilog/db/LCD_Top.sld_design_entry_dsc.sci
LCD1602_Verilog/db/LCD_Top.smp_dump.txt
LCD1602_Verilog/db/LCD_Top.syn_hier_info
LCD1602_Verilog/db/LCD_Top.tan.qmsg
LCD1602_Verilog/db/LCD_Top.tis_db_list.ddb
LCD1602_Verilog/db/LCD_Top_global_asgn_op.abo
LCD1602_Verilog/db/prev_cmp_LCD_Top.asm.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.fit.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.map.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.tan.qmsg
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.dfp
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.kpt
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.logdb
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.rcf
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.dpi
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.kpt
LCD1602_Verilog/incremental_db/README
LCD1602_Verilog/LCD_Driver.v
LCD1602_Verilog/LCD_Driver.v.bak
LCD1602_Verilog/LCD_Top.asm.rpt
LCD1602_Verilog/LCD_Top.cdf
LCD1602_Verilog/LCD_Top.done
LCD1602_Verilog/LCD_Top.dpf
LCD1602_Verilog/LCD_Top.fit.rpt
LCD1602_Verilog/LCD_Top.fit.smsg
LCD1602_Verilog/LCD_Top.fit.summary
LCD1602_Verilog/LCD_Top.flow.rpt
LCD1602_Verilog/LCD_Top.map.rpt
LCD1602_Verilog/LCD_Top.map.summary
LCD1602_Verilog/LCD_Top.pin
LCD1602_Verilog/LCD_Top.pof
LCD1602_Verilog/LCD_Top.qpf
LCD1602_Verilog/LCD_Top.qsf
LCD1602_Verilog/LCD_Top.sof
LCD1602_Verilog/LCD_Top.tan.rpt
LCD1602_Verilog/LCD_Top.tan.summary
LCD1602_Verilog/LCD_Top.v
LCD1602_Verilog/LCD_Top.v.bak
LCD1602_Verilog/sopc_builder_log.txt
LCD1602_Verilog/incremental_db/compiled_partitions
LCD1602_Verilog/.sopc_builder
LCD1602_Verilog/db
LCD1602_Verilog/incremental_db
LCD1602_Verilog
LCD1602_Verilog/Clock_Gen.v
LCD1602_Verilog/Clock_Gen.v.bak
LCD1602_Verilog/db/LCD_Top.(0).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(0).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(1).cnf.hdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.cdb
LCD1602_Verilog/db/LCD_Top.(2).cnf.hdb
LCD1602_Verilog/db/LCD_Top.ace_cmp.bpm
LCD1602_Verilog/db/LCD_Top.ace_cmp.cdb
LCD1602_Verilog/db/LCD_Top.ace_cmp.ecobp
LCD1602_Verilog/db/LCD_Top.ace_cmp.hdb
LCD1602_Verilog/db/LCD_Top.asm.qmsg
LCD1602_Verilog/db/LCD_Top.cbx.xml
LCD1602_Verilog/db/LCD_Top.cmp.bpm
LCD1602_Verilog/db/LCD_Top.cmp.cdb
LCD1602_Verilog/db/LCD_Top.cmp.ecobp
LCD1602_Verilog/db/LCD_Top.cmp.hdb
LCD1602_Verilog/db/LCD_Top.cmp.kpt
LCD1602_Verilog/db/LCD_Top.cmp.logdb
LCD1602_Verilog/db/LCD_Top.cmp.rdb
LCD1602_Verilog/db/LCD_Top.cmp.tdb
LCD1602_Verilog/db/LCD_Top.cmp0.ddb
LCD1602_Verilog/db/LCD_Top.cmp_merge.kpt
LCD1602_Verilog/db/LCD_Top.db_info
LCD1602_Verilog/db/LCD_Top.eco.cdb
LCD1602_Verilog/db/LCD_Top.fit.qmsg
LCD1602_Verilog/db/LCD_Top.hier_info
LCD1602_Verilog/db/LCD_Top.hif
LCD1602_Verilog/db/LCD_Top.lpc.html
LCD1602_Verilog/db/LCD_Top.lpc.rdb
LCD1602_Verilog/db/LCD_Top.lpc.txt
LCD1602_Verilog/db/LCD_Top.map.bpm
LCD1602_Verilog/db/LCD_Top.map.cdb
LCD1602_Verilog/db/LCD_Top.map.ecobp
LCD1602_Verilog/db/LCD_Top.map.hdb
LCD1602_Verilog/db/LCD_Top.map.kpt
LCD1602_Verilog/db/LCD_Top.map.logdb
LCD1602_Verilog/db/LCD_Top.map.qmsg
LCD1602_Verilog/db/LCD_Top.map_bb.cdb
LCD1602_Verilog/db/LCD_Top.map_bb.hdb
LCD1602_Verilog/db/LCD_Top.map_bb.logdb
LCD1602_Verilog/db/LCD_Top.pre_map.cdb
LCD1602_Verilog/db/LCD_Top.pre_map.hdb
LCD1602_Verilog/db/LCD_Top.rtlv.hdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg.cdb
LCD1602_Verilog/db/LCD_Top.rtlv_sg_swap.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.cdb
LCD1602_Verilog/db/LCD_Top.sgdiff.hdb
LCD1602_Verilog/db/LCD_Top.sld_design_entry.sci
LCD1602_Verilog/db/LCD_Top.sld_design_entry_dsc.sci
LCD1602_Verilog/db/LCD_Top.smp_dump.txt
LCD1602_Verilog/db/LCD_Top.syn_hier_info
LCD1602_Verilog/db/LCD_Top.tan.qmsg
LCD1602_Verilog/db/LCD_Top.tis_db_list.ddb
LCD1602_Verilog/db/LCD_Top_global_asgn_op.abo
LCD1602_Verilog/db/prev_cmp_LCD_Top.asm.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.fit.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.map.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.qmsg
LCD1602_Verilog/db/prev_cmp_LCD_Top.tan.qmsg
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.dfp
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.kpt
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.logdb
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.cmp.rcf
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.atm
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.dpi
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.hdbx
LCD1602_Verilog/incremental_db/compiled_partitions/LCD_Top.root_partition.map.kpt
LCD1602_Verilog/incremental_db/README
LCD1602_Verilog/LCD_Driver.v
LCD1602_Verilog/LCD_Driver.v.bak
LCD1602_Verilog/LCD_Top.asm.rpt
LCD1602_Verilog/LCD_Top.cdf
LCD1602_Verilog/LCD_Top.done
LCD1602_Verilog/LCD_Top.dpf
LCD1602_Verilog/LCD_Top.fit.rpt
LCD1602_Verilog/LCD_Top.fit.smsg
LCD1602_Verilog/LCD_Top.fit.summary
LCD1602_Verilog/LCD_Top.flow.rpt
LCD1602_Verilog/LCD_Top.map.rpt
LCD1602_Verilog/LCD_Top.map.summary
LCD1602_Verilog/LCD_Top.pin
LCD1602_Verilog/LCD_Top.pof
LCD1602_Verilog/LCD_Top.qpf
LCD1602_Verilog/LCD_Top.qsf
LCD1602_Verilog/LCD_Top.sof
LCD1602_Verilog/LCD_Top.tan.rpt
LCD1602_Verilog/LCD_Top.tan.summary
LCD1602_Verilog/LCD_Top.v
LCD1602_Verilog/LCD_Top.v.bak
LCD1602_Verilog/sopc_builder_log.txt
LCD1602_Verilog/incremental_db/compiled_partitions
LCD1602_Verilog/.sopc_builder
LCD1602_Verilog/db
LCD1602_Verilog/incremental_db
LCD1602_Verilog
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