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文件名称:cpu

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    2012-11-16
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    909.75kb
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一个简单的CPU设计,支持add,sub,mvi,mv四条指令,用Verilog语言编写,在Quratus II上编译通过,仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

cpu/AddSub.v
cpu/AddSub.v.bak
cpu/ccounter.v
cpu/ccounter.v.bak
cpu/Controlunit.v
cpu/Controlunit.v.bak
cpu/Counter.v
cpu/Counter.v.bak
cpu/cpu.asm.rpt
cpu/cpu.done
cpu/cpu.dpf
cpu/cpu.fit.rpt
cpu/cpu.fit.smsg
cpu/cpu.fit.summary
cpu/cpu.flow.rpt
cpu/cpu.map.rpt
cpu/cpu.map.smsg
cpu/cpu.map.summary
cpu/cpu.pin
cpu/cpu.pof
cpu/cpu.qpf
cpu/cpu.qsf
cpu/cpu.qws
cpu/cpu.sim.rpt
cpu/cpu.sof
cpu/cpu.tan.rpt
cpu/cpu.tan.summary
cpu/cpu.v
cpu/cpu.v.bak
cpu/cpu.vwf
cpu/cpu_assignment_defaults.qdf
cpu/db/altsyncram_0091.tdf
cpu/db/altsyncram_tq71.tdf
cpu/db/cpu.(0).cnf.cdb
cpu/db/cpu.(0).cnf.hdb
cpu/db/cpu.(1).cnf.cdb
cpu/db/cpu.(1).cnf.hdb
cpu/db/cpu.(10).cnf.cdb
cpu/db/cpu.(10).cnf.hdb
cpu/db/cpu.(11).cnf.cdb
cpu/db/cpu.(11).cnf.hdb
cpu/db/cpu.(2).cnf.cdb
cpu/db/cpu.(2).cnf.hdb
cpu/db/cpu.(3).cnf.cdb
cpu/db/cpu.(3).cnf.hdb
cpu/db/cpu.(4).cnf.cdb
cpu/db/cpu.(4).cnf.hdb
cpu/db/cpu.(5).cnf.cdb
cpu/db/cpu.(5).cnf.hdb
cpu/db/cpu.(6).cnf.cdb
cpu/db/cpu.(6).cnf.hdb
cpu/db/cpu.(7).cnf.cdb
cpu/db/cpu.(7).cnf.hdb
cpu/db/cpu.(8).cnf.cdb
cpu/db/cpu.(8).cnf.hdb
cpu/db/cpu.(9).cnf.cdb
cpu/db/cpu.(9).cnf.hdb
cpu/db/cpu.asm.qmsg
cpu/db/cpu.cbx.xml
cpu/db/cpu.cmp.ecobp
cpu/db/cpu.cmp.kpt
cpu/db/cpu.cmp.rdb
cpu/db/cpu.cmp0.ddb
cpu/db/cpu.cmp_merge.kpt
cpu/db/cpu.db_info
cpu/db/cpu.eco.cdb
cpu/db/cpu.eds_overflow
cpu/db/cpu.fit.qmsg
cpu/db/cpu.fnsim.cdb
cpu/db/cpu.fnsim.hdb
cpu/db/cpu.fnsim.qmsg
cpu/db/cpu.hier_info
cpu/db/cpu.hif
cpu/db/cpu.lpc.html
cpu/db/cpu.lpc.rdb
cpu/db/cpu.lpc.txt
cpu/db/cpu.map.bpm
cpu/db/cpu.map.cdb
cpu/db/cpu.map.ecobp
cpu/db/cpu.map.hdb
cpu/db/cpu.map.kpt
cpu/db/cpu.map.logdb
cpu/db/cpu.map.qmsg
cpu/db/cpu.map_bb.cdb
cpu/db/cpu.map_bb.hdb
cpu/db/cpu.map_bb.logdb
cpu/db/cpu.pre_map.cdb
cpu/db/cpu.pre_map.hdb
cpu/db/cpu.rtlv.hdb
cpu/db/cpu.rtlv_sg.cdb
cpu/db/cpu.rtlv_sg_swap.cdb
cpu/db/cpu.sgdiff.cdb
cpu/db/cpu.sgdiff.hdb
cpu/db/cpu.sim.cvwf
cpu/db/cpu.sim.hdb
cpu/db/cpu.sim.qmsg
cpu/db/cpu.sim.rdb
cpu/db/cpu.simfam
cpu/db/cpu.sld_design_entry.sci
cpu/db/cpu.sld_design_entry_dsc.sci
cpu/db/cpu.syn_hier_info
cpu/db/cpu.tan.qmsg
cpu/db/cpu.tis_db_list.ddb
cpu/db/cpu_global_asgn_op.abo
cpu/db/mux_umc.tdf
cpu/db/prev_cmp_cpu.asm.qmsg
cpu/db/prev_cmp_cpu.fit.qmsg
cpu/db/prev_cmp_cpu.map.qmsg
cpu/db/prev_cmp_cpu.qmsg
cpu/db/prev_cmp_cpu.sim.qmsg
cpu/db/prev_cmp_cpu.tan.qmsg
cpu/db/Waveform1.sim.cvwf
cpu/db/wed.wsf
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.atm
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.dfp
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.hdbx
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.kpt
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.logdb
cpu/incremental_db/compiled_partitions/cpu.root_partition.cmp.rcf
cpu/incremental_db/compiled_partitions/cpu.root_partition.map.atm
cpu/incremental_db/compiled_partitions/cpu.root_partition.map.dpi
cpu/incremental_db/compiled_partitions/cpu.root_partition.map.hdbx
cpu/incremental_db/compiled_partitions/cpu.root_partition.map.kpt
cpu/incremental_db/README
cpu/IR.v
cpu/IR.v.bak
cpu/Merory.bsf
cpu/Merory.mif
cpu/Merory.qip
cpu/Merory.v
cpu/Merory_wave0.jpg
cpu/Merory_waveforms.html
cpu/Multiplexers.v
cpu/Multiplexers.v.bak
cpu/Processor.v
cpu/Processor.v.bak
cpu/Register.v
cpu/Register.v.bak
cpu/serv_req_info.txt
cpu/Waveform1.vwf
cpu/incremental_db/compiled_partitions
cpu/db
cpu/incremental_db
cpu

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