文件名称:Day2
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- 上传时间:2012-11-16
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文件大小:499.93kb
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关于FPGA的文档,通过此文档可以更好的学习FPGA的运作和开发。-Documentation on the FPGA, through this document can better learn the operation and development of FPGA.
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下载文件列表
Day2/Day2/day2_dds/day2_dds/dds.cr.mti
Day2/Day2/day2_dds/day2_dds/dds.mpf
Day2/Day2/day2_dds/day2_dds/dds.v
Day2/Day2/day2_dds/day2_dds/dds.v.bak
Day2/Day2/day2_dds/day2_dds/SineTable.dat
Day2/Day2/day2_dds/day2_dds/testbench.v
Day2/Day2/day2_dds/day2_dds/testbench.v.bak
Day2/Day2/day2_dds/day2_dds/vsim.wlf
Day2/Day2/day2_dds/day2_dds/wave.do
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/verilog.prw
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/verilog.psm
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.dat
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.dbs
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.vhd
Day2/Day2/day2_dds/day2_dds/work/testbench/verilog.prw
Day2/Day2/day2_dds/day2_dds/work/testbench/verilog.psm
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.dat
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.dbs
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.vhd
Day2/Day2/day2_dds/day2_dds/work/_info
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogDiI6UV
Day2/Day2/day2_dds/day2_dds/work/_temp/vloghPU9az
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogHrHl19
Day2/Day2/day2_dds/day2_dds/work/_temp/vloglpJ3zv
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogQPLAwM
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogU7OXom
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogUXD7Vs
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogXKMiqV
Day2/Day2/day2_dds/day2_dds/work/_vmake
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.cr.mti
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.mpf
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.v
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.v.bak
Day2/Day2/day2_seqdet/day2_seqdet/testbench.v
Day2/Day2/day2_seqdet/day2_seqdet/testbench.v.bak
Day2/Day2/day2_seqdet/day2_seqdet/vsim.wlf
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/verilog.prw
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/verilog.psm
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.dat
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.dbs
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.vhd
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/verilog.prw
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/verilog.psm
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.dat
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.dbs
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.vhd
Day2/Day2/day2_seqdet/day2_seqdet/work/_info
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog2Gp0Yr
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog5EYjBF
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog5HAZYj
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog6yPBnO
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogAjovHW
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogcYLfcM
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogD0xx62
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogDNzzR9
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogE7FHpW
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogeBZduA
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogfI8NKR
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vloghAn7e1
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vloghHlihB
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogHqLq8z
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogi2Epsr
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogICVsCP
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogkfjTTI
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogp52MB2
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogp7T4Hx
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogpWGn83
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogQRW2tv
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogr6UEYU
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogRpBaAh
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogUGAGy4
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogV4QS8H
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogvwxjlT
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogzan7kt
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogzNmA09
Day2/Day2/day2_seqdet/day2_seqdet/work/_vmake
Day2/Day2/FPGA和SOPC应用 - 可综合的VerilogHDL.pptx
Day2/Day2/FPGA和SOPC应用 - 同步设计、状态机.pptx
Day2/Day2/Memory Data Generator.exe
Day2/Day2/zzly01/test.v
Day2/Day2/zzly01/test.v.bak
Day2/Day2/zzly01/testbench.v
Day2/Day2/zzly01/vsim.wlf
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/verilog.prw
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/verilog.psm
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.dat
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.dbs
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.vhd
Day2/Day2/zzly01/work/test/verilog.prw
Day2/Day2/zzly01/work/test/verilog.psm
Day2/Day2/zzly01/work/test/_primary.dat
Day2/Day2/zzly01/work/test/_primary.dbs
Day2/Day2/zzly01/work/test/_primary.vhd
Day2/Day2/zzly01/work/testbench/verilog.prw
Day2/Day2/zzly01/work/testbench/verilog.psm
Day2/Day2/zzly01/work/testbench/_primary.dat
Day2/Day2/zzly01/work/testbench/_primary.dbs
Day2/Day2/zzly01/work/testbench/_primary.vhd
Day2/Day2/zzly01/work/_info
Day2/Day2/zzly01/work/_temp/vlog8r6fwY
Day2/Day2/zzly01/work/_temp/vlog9KozY0
Day2/Day2/zzly01/work/_temp/vlogA0cMKW
Day2/Day2/zzly01/work/_temp/vlogG2v2gV
Day2/Day2/zzly01/work/_temp/vlogjG9wRy
Day2/Day2/zzly01/work/_temp/vl
Day2/Day2/day2_dds/day2_dds/dds.mpf
Day2/Day2/day2_dds/day2_dds/dds.v
Day2/Day2/day2_dds/day2_dds/dds.v.bak
Day2/Day2/day2_dds/day2_dds/SineTable.dat
Day2/Day2/day2_dds/day2_dds/testbench.v
Day2/Day2/day2_dds/day2_dds/testbench.v.bak
Day2/Day2/day2_dds/day2_dds/vsim.wlf
Day2/Day2/day2_dds/day2_dds/wave.do
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/verilog.prw
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/verilog.psm
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.dat
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.dbs
Day2/Day2/day2_dds/day2_dds/work/@d@d@s/_primary.vhd
Day2/Day2/day2_dds/day2_dds/work/testbench/verilog.prw
Day2/Day2/day2_dds/day2_dds/work/testbench/verilog.psm
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.dat
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.dbs
Day2/Day2/day2_dds/day2_dds/work/testbench/_primary.vhd
Day2/Day2/day2_dds/day2_dds/work/_info
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogDiI6UV
Day2/Day2/day2_dds/day2_dds/work/_temp/vloghPU9az
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogHrHl19
Day2/Day2/day2_dds/day2_dds/work/_temp/vloglpJ3zv
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogQPLAwM
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogU7OXom
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogUXD7Vs
Day2/Day2/day2_dds/day2_dds/work/_temp/vlogXKMiqV
Day2/Day2/day2_dds/day2_dds/work/_vmake
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.cr.mti
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.mpf
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.v
Day2/Day2/day2_seqdet/day2_seqdet/seqdet.v.bak
Day2/Day2/day2_seqdet/day2_seqdet/testbench.v
Day2/Day2/day2_seqdet/day2_seqdet/testbench.v.bak
Day2/Day2/day2_seqdet/day2_seqdet/vsim.wlf
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/verilog.prw
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/verilog.psm
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.dat
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.dbs
Day2/Day2/day2_seqdet/day2_seqdet/work/seqdet/_primary.vhd
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/verilog.prw
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/verilog.psm
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.dat
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.dbs
Day2/Day2/day2_seqdet/day2_seqdet/work/testbench/_primary.vhd
Day2/Day2/day2_seqdet/day2_seqdet/work/_info
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog2Gp0Yr
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog5EYjBF
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog5HAZYj
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlog6yPBnO
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogAjovHW
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogcYLfcM
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogD0xx62
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogDNzzR9
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogE7FHpW
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogeBZduA
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogfI8NKR
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vloghAn7e1
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vloghHlihB
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogHqLq8z
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogi2Epsr
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogICVsCP
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogkfjTTI
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogp52MB2
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogp7T4Hx
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogpWGn83
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogQRW2tv
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogr6UEYU
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogRpBaAh
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogUGAGy4
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogV4QS8H
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogvwxjlT
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogzan7kt
Day2/Day2/day2_seqdet/day2_seqdet/work/_temp/vlogzNmA09
Day2/Day2/day2_seqdet/day2_seqdet/work/_vmake
Day2/Day2/FPGA和SOPC应用 - 可综合的VerilogHDL.pptx
Day2/Day2/FPGA和SOPC应用 - 同步设计、状态机.pptx
Day2/Day2/Memory Data Generator.exe
Day2/Day2/zzly01/test.v
Day2/Day2/zzly01/test.v.bak
Day2/Day2/zzly01/testbench.v
Day2/Day2/zzly01/vsim.wlf
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/verilog.prw
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/verilog.psm
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.dat
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.dbs
Day2/Day2/zzly01/work/@u200813513_@ji@z@y/_primary.vhd
Day2/Day2/zzly01/work/test/verilog.prw
Day2/Day2/zzly01/work/test/verilog.psm
Day2/Day2/zzly01/work/test/_primary.dat
Day2/Day2/zzly01/work/test/_primary.dbs
Day2/Day2/zzly01/work/test/_primary.vhd
Day2/Day2/zzly01/work/testbench/verilog.prw
Day2/Day2/zzly01/work/testbench/verilog.psm
Day2/Day2/zzly01/work/testbench/_primary.dat
Day2/Day2/zzly01/work/testbench/_primary.dbs
Day2/Day2/zzly01/work/testbench/_primary.vhd
Day2/Day2/zzly01/work/_info
Day2/Day2/zzly01/work/_temp/vlog8r6fwY
Day2/Day2/zzly01/work/_temp/vlog9KozY0
Day2/Day2/zzly01/work/_temp/vlogA0cMKW
Day2/Day2/zzly01/work/_temp/vlogG2v2gV
Day2/Day2/zzly01/work/_temp/vlogjG9wRy
Day2/Day2/zzly01/work/_temp/vl
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