labsolutions/
labsolutions/verilog/
labsolutions/verilog/lab1/
labsolutions/verilog/lab1/Assembler/
labsolutions/verilog/lab1/Assembler/CONSTANT.TXT
labsolutions/verilog/lab1/Assembler/INT_TEST.COE
labsolutions/verilog/lab1/Assembler/INT_TEST.DEC
labsolutions/verilog/lab1/Assembler/INT_TEST.FMT
labsolutions/verilog/lab1/Assembler/INT_TEST.HEX
labsolutions/verilog/lab1/Assembler/INT_TEST.LOG
labsolutions/verilog/lab1/Assembler/INT_TEST.M
labsolutions/verilog/lab1/Assembler/int_test.psm
labsolutions/verilog/lab1/Assembler/INT_TEST.V
labsolutions/verilog/lab1/Assembler/INT_TEST.VHD
labsolutions/verilog/lab1/Assembler/KCPSM3.EXE
labsolutions/verilog/lab1/Assembler/LABELS.TXT
labsolutions/verilog/lab1/Assembler/PASS1.DAT
labsolutions/verilog/lab1/Assembler/PASS2.DAT
labsolutions/verilog/lab1/Assembler/PASS3.DAT
labsolutions/verilog/lab1/Assembler/PASS4.DAT
labsolutions/verilog/lab1/Assembler/PASS5.DAT
labsolutions/verilog/lab1/Assembler/ROM_form.coe
labsolutions/verilog/lab1/Assembler/ROM_form.v
labsolutions/verilog/lab1/Assembler/ROM_form.vhd
labsolutions/verilog/lab1/Assembler/UCLOCK.COE
labsolutions/verilog/lab1/Assembler/UCLOCK.DEC
labsolutions/verilog/lab1/Assembler/UCLOCK.FMT
labsolutions/verilog/lab1/Assembler/UCLOCK.HEX
labsolutions/verilog/lab1/Assembler/UCLOCK.LOG
labsolutions/verilog/lab1/Assembler/UCLOCK.M
labsolutions/verilog/lab1/Assembler/uclock.psm
labsolutions/verilog/lab1/Assembler/UCLOCK.V
labsolutions/verilog/lab1/Assembler/UCLOCK.VHD
labsolutions/verilog/lab1/Flow_Lab/
labsolutions/verilog/lab1/Flow_Lab/Flow_Lab.ise
labsolutions/verilog/lab1/Flow_Lab/Flow_Lab.ise_8.1i_backup
labsolutions/verilog/lab1/Flow_Lab/Flow_Lab.ise_ISE_Backup
labsolutions/verilog/lab1/Flow_Lab/Flow_Lab.ntrc_log
labsolutions/verilog/lab1/Flow_Lab/INT_TEST.V
labsolutions/verilog/lab1/Flow_Lab/isim.hdlsourcefiles
labsolutions/verilog/lab1/Flow_Lab/isim.log
labsolutions/verilog/lab1/Flow_Lab/isim.tmp_save/
labsolutions/verilog/lab1/Flow_Lab/isim.tmp_save/_1
labsolutions/verilog/lab1/Flow_Lab/isimwavedata.xwv
labsolutions/verilog/lab1/Flow_Lab/kcpsm3.v
labsolutions/verilog/lab1/Flow_Lab/kcpsm3_int_test.v
labsolutions/verilog/lab1/Flow_Lab/kcpsm3_int_test_prev_built.ngd
labsolutions/verilog/lab1/Flow_Lab/kcpsm3_int_test_summary.html
labsolutions/verilog/lab1/Flow_Lab/kcpsm3_int_test_vhdl.prj
labsolutions/verilog/lab1/Flow_Lab/testbench.v
labsolutions/verilog/lab1/Flow_Lab/testbench_beh.prj
labsolutions/verilog/lab1/Flow_Lab/testbench_isim_beh.exe
labsolutions/verilog/lab1/Flow_Lab/_xmsgs/
labsolutions/verilog/lab1/Flow_Lab/_xmsgs/fuse.xmsgs
labsolutions/verilog/lab1/Flow_Lab/__ISE_repository_Flow_Lab.ise_.lock
labsolutions/verilog/lab2/
labsolutions/verilog/lab2/arwz_pace.dhp
labsolutions/verilog/lab2/arwz_pace.ise
labsolutions/verilog/lab2/arwz_pace.ise.old
labsolutions/verilog/lab2/arwz_pace.ise_8.1i_backup
labsolutions/verilog/lab2/arwz_pace.ise_ISE_Backup
labsolutions/verilog/lab2/arwz_pace.ntrc_log
labsolutions/verilog/lab2/bbfifo_16x8.v
labsolutions/verilog/lab2/kcpsm3.v
labsolutions/verilog/lab2/kcuart_rx.v
labsolutions/verilog/lab2/kcuart_tx.v
labsolutions/verilog/lab2/my_dcm.xaw
labsolutions/verilog/lab2/Project.dhp
labsolutions/verilog/lab2/transcript
labsolutions/verilog/lab2/uart_clock.ucf
labsolutions/verilog/lab2/uart_clock.ut
labsolutions/verilog/lab2/uart_clock.v
labsolutions/verilog/lab2/uart_clock_prev_built.ngd
labsolutions/verilog/lab2/uart_clock_summary.html
labsolutions/verilog/lab2/uart_clock_usage.xml
labsolutions/verilog/lab2/uart_clock_vhdl.prj
labsolutions/verilog/lab2/uart_rx.v
labsolutions/verilog/lab2/uart_rx_summary.html
labsolutions/verilog/lab2/uart_tx.v
labsolutions/verilog/lab2/UCLOCK.V
labsolutions/verilog/lab2/_impact.cmd
labsolutions/verilog/lab2/_impact.log
labsolutions/verilog/lab2/_pace.ucf
labsolutions/verilog/lab2/_xmsgs/
labsolutions/verilog/lab2/__ISE_repository_arwz_pace.ise_.lock
labsolutions/verilog/lab3/
labsolutions/verilog/lab3/Assembler/
labsolutions/verilog/lab3/Assembler/assemble.bat
labsolutions/verilog/lab3/Assembler/CONSTANT.TXT
labsolutions/verilog/lab3/Assembler/KCPSM3.EXE
labsolutions/verilog/lab3/Assembler/LABELS.TXT
labsolutions/verilog/lab3/Assembler/PASS1.DAT
labsolutions/verilog/lab3/Assembler/PASS2.DAT
labsolutions/verilog/lab3/Assembler/PASS3.DAT
labsolutions/verilog/lab3/Assembler/PASS4.DAT
labsolutions/verilog/lab3/Assembler/PASS5.DAT
labsolutions/verilog/lab3/Assembler/PROGRAM.COE
labsolutions/verilog/lab3/Assembler/PROGRAM.DEC
labsolutions/verilog/lab3/Assembler/PROGRAM.FMT
labsolutions/verilog/lab3/Assembler/PROGRAM.HEX
labsolutions/verilog/lab3/Assembler/PROGRAM.LOG
labsolutions/verilog/lab3/Assembler/PROGRAM.M
labsolutions/verilog/lab3/Assembler/program.psm
labsolutions/verilog/lab3/Assembler/PROGRAM.V
labsolutions/verilog/lab3/Assembler/PROGRAM.VHD
labsolutions/verilog/lab3/Assembler/ROM_form.coe
labsolutions/verilog/lab3/Assembler/ROM_form.v
labsolutions/verilog/lab3/Assembler/ROM_form.vhd
labsolutions/verilog/lab3/Assembler/transcript
labsolutions/verilog/lab3/loopback.v
labsolutions/verilog/lab3/testbench.v
labsolutions/verilog/lab3/time_const/
labsolutions/verilog