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文件名称:60and24

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2012-11-16
  • 文件大小：
    229.48kb
  • 已下载：
    0次
  • 提 供 者：
    李***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
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一个60和24进制的vhdl例子（经检测好用）-A 60 and 24 hex vhdl example (tested easy to use)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

jsqzs24_t15/db/jsqzs24_t15.(0).cnf.cdb
jsqzs24_t15/db/jsqzs24_t15.(0).cnf.hdb
jsqzs24_t15/db/jsqzs24_t15.asm.qmsg
jsqzs24_t15/db/jsqzs24_t15.cbx.xml
jsqzs24_t15/db/jsqzs24_t15.cmp.cdb
jsqzs24_t15/db/jsqzs24_t15.cmp.hdb
jsqzs24_t15/db/jsqzs24_t15.cmp.kpt
jsqzs24_t15/db/jsqzs24_t15.cmp.logdb
jsqzs24_t15/db/jsqzs24_t15.cmp.rdb
jsqzs24_t15/db/jsqzs24_t15.cmp.tdb
jsqzs24_t15/db/jsqzs24_t15.cmp0.ddb
jsqzs24_t15/db/jsqzs24_t15.dbp
jsqzs24_t15/db/jsqzs24_t15.db_info
jsqzs24_t15/db/jsqzs24_t15.eco.cdb
jsqzs24_t15/db/jsqzs24_t15.fit.qmsg
jsqzs24_t15/db/jsqzs24_t15.hier_info
jsqzs24_t15/db/jsqzs24_t15.hif
jsqzs24_t15/db/jsqzs24_t15.map.cdb
jsqzs24_t15/db/jsqzs24_t15.map.hdb
jsqzs24_t15/db/jsqzs24_t15.map.logdb
jsqzs24_t15/db/jsqzs24_t15.map.qmsg
jsqzs24_t15/db/jsqzs24_t15.pre_map.cdb
jsqzs24_t15/db/jsqzs24_t15.pre_map.hdb
jsqzs24_t15/db/jsqzs24_t15.psp
jsqzs24_t15/db/jsqzs24_t15.pss
jsqzs24_t15/db/jsqzs24_t15.rtlv.hdb
jsqzs24_t15/db/jsqzs24_t15.rtlv_sg.cdb
jsqzs24_t15/db/jsqzs24_t15.rtlv_sg_swap.cdb
jsqzs24_t15/db/jsqzs24_t15.sgdiff.cdb
jsqzs24_t15/db/jsqzs24_t15.sgdiff.hdb
jsqzs24_t15/db/jsqzs24_t15.signalprobe.cdb
jsqzs24_t15/db/jsqzs24_t15.sld_design_entry.sci
jsqzs24_t15/db/jsqzs24_t15.sld_design_entry_dsc.sci
jsqzs24_t15/db/jsqzs24_t15.syn_hier_info
jsqzs24_t15/db/jsqzs24_t15.tan.qmsg
jsqzs24_t15/jsqzs24_t15.asm.rpt
jsqzs24_t15/jsqzs24_t15.done
jsqzs24_t15/jsqzs24_t15.fit.rpt
jsqzs24_t15/jsqzs24_t15.fit.smsg
jsqzs24_t15/jsqzs24_t15.fit.summary
jsqzs24_t15/jsqzs24_t15.flow.rpt
jsqzs24_t15/jsqzs24_t15.map.rpt
jsqzs24_t15/jsqzs24_t15.map.summary
jsqzs24_t15/jsqzs24_t15.pin
jsqzs24_t15/jsqzs24_t15.pof
jsqzs24_t15/jsqzs24_t15.qpf
jsqzs24_t15/jsqzs24_t15.qsf
jsqzs24_t15/jsqzs24_t15.qws
jsqzs24_t15/jsqzs24_t15.sof
jsqzs24_t15/jsqzs24_t15.tan.rpt
jsqzs24_t15/jsqzs24_t15.tan.summary
jsqzs24_t15/jsqzs24_t15.vhd
jsqzs60_t15/db/jsqzs60_t15.(0).cnf.cdb
jsqzs60_t15/db/jsqzs60_t15.(0).cnf.hdb
jsqzs60_t15/db/jsqzs60_t15.asm.qmsg
jsqzs60_t15/db/jsqzs60_t15.cbx.xml
jsqzs60_t15/db/jsqzs60_t15.cmp.cdb
jsqzs60_t15/db/jsqzs60_t15.cmp.hdb
jsqzs60_t15/db/jsqzs60_t15.cmp.kpt
jsqzs60_t15/db/jsqzs60_t15.cmp.logdb
jsqzs60_t15/db/jsqzs60_t15.cmp.rdb
jsqzs60_t15/db/jsqzs60_t15.cmp.tdb
jsqzs60_t15/db/jsqzs60_t15.cmp0.ddb
jsqzs60_t15/db/jsqzs60_t15.dbp
jsqzs60_t15/db/jsqzs60_t15.db_info
jsqzs60_t15/db/jsqzs60_t15.eco.cdb
jsqzs60_t15/db/jsqzs60_t15.fit.qmsg
jsqzs60_t15/db/jsqzs60_t15.hier_info
jsqzs60_t15/db/jsqzs60_t15.hif
jsqzs60_t15/db/jsqzs60_t15.map.cdb
jsqzs60_t15/db/jsqzs60_t15.map.hdb
jsqzs60_t15/db/jsqzs60_t15.map.logdb
jsqzs60_t15/db/jsqzs60_t15.map.qmsg
jsqzs60_t15/db/jsqzs60_t15.pre_map.cdb
jsqzs60_t15/db/jsqzs60_t15.pre_map.hdb
jsqzs60_t15/db/jsqzs60_t15.psp
jsqzs60_t15/db/jsqzs60_t15.pss
jsqzs60_t15/db/jsqzs60_t15.rtlv.hdb
jsqzs60_t15/db/jsqzs60_t15.rtlv_sg.cdb
jsqzs60_t15/db/jsqzs60_t15.rtlv_sg_swap.cdb
jsqzs60_t15/db/jsqzs60_t15.sgdiff.cdb
jsqzs60_t15/db/jsqzs60_t15.sgdiff.hdb
jsqzs60_t15/db/jsqzs60_t15.signalprobe.cdb
jsqzs60_t15/db/jsqzs60_t15.sld_design_entry.sci
jsqzs60_t15/db/jsqzs60_t15.sld_design_entry_dsc.sci
jsqzs60_t15/db/jsqzs60_t15.syn_hier_info
jsqzs60_t15/db/jsqzs60_t15.tan.qmsg
jsqzs60_t15/jsqzs60_t15.asm.rpt
jsqzs60_t15/jsqzs60_t15.done
jsqzs60_t15/jsqzs60_t15.fit.rpt
jsqzs60_t15/jsqzs60_t15.fit.smsg
jsqzs60_t15/jsqzs60_t15.fit.summary
jsqzs60_t15/jsqzs60_t15.flow.rpt
jsqzs60_t15/jsqzs60_t15.map.rpt
jsqzs60_t15/jsqzs60_t15.map.summary
jsqzs60_t15/jsqzs60_t15.pin
jsqzs60_t15/jsqzs60_t15.pof
jsqzs60_t15/jsqzs60_t15.qpf
jsqzs60_t15/jsqzs60_t15.qsf
jsqzs60_t15/jsqzs60_t15.qws
jsqzs60_t15/jsqzs60_t15.sof
jsqzs60_t15/jsqzs60_t15.tan.rpt
jsqzs60_t15/jsqzs60_t15.tan.summary
jsqzs60_t15/jsqzs60_t15.vhd
jsqzs24_t15/db
jsqzs60_t15/db
jsqzs24_t15
jsqzs60_t15

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