文件名称:mul_ser12
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- 上传时间：2012-11-16
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文件大小：298.39kb
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本源码是用Verilog编写的12位移位相加乘法器的设计源码，开发软件为MAX+PLUS，已经测试通过。-The Verilog source code is written in the sum of 12-bit shift multiplier design source code, developing software for the MAX+ PLUS, has been tested.
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下载文件列表
mul_ser12/basic_mul12(1).cnf
mul_ser12/basic_mul12(10).cnf
mul_ser12/basic_mul12(11).cnf
mul_ser12/basic_mul12(12).cnf
mul_ser12/basic_mul12(13).cnf
mul_ser12/basic_mul12(14).cnf
mul_ser12/basic_mul12(15).cnf
mul_ser12/basic_mul12(16).cnf
mul_ser12/basic_mul12(17).cnf
mul_ser12/basic_mul12(2).cnf
mul_ser12/basic_mul12(3).cnf
mul_ser12/basic_mul12(4).cnf
mul_ser12/basic_mul12(5).cnf
mul_ser12/basic_mul12(6).cnf
mul_ser12/basic_mul12(7).cnf
mul_ser12/basic_mul12(8).cnf
mul_ser12/basic_mul12(9).cnf
mul_ser12/basic_mul12.acf
mul_ser12/basic_mul12.cnf
mul_ser12/basic_mul12.fit
mul_ser12/basic_mul12.hex
mul_ser12/basic_mul12.hif
mul_ser12/basic_mul12.mmf
mul_ser12/basic_mul12.ndb
mul_ser12/basic_mul12.pin
mul_ser12/basic_mul12.pof
mul_ser12/basic_mul12.rpt
mul_ser12/basic_mul12.scf
mul_ser12/basic_mul12.snf
mul_ser12/basic_mul12.sof
mul_ser12/basic_mul12.ttf
mul_ser12/basic_mul12.v
mul_ser12/LIB.DLS
mul_ser12/mul_ser12(1).cnf
mul_ser12/mul_ser12(2).cnf
mul_ser12/mul_ser12(3).cnf
mul_ser12/mul_ser12(4).cnf
mul_ser12/mul_ser12(5).cnf
mul_ser12/mul_ser12(6).cnf
mul_ser12/mul_ser12(7).cnf
mul_ser12/mul_ser12.acf
mul_ser12/mul_ser12.cnf
mul_ser12/mul_ser12.fit
mul_ser12/mul_ser12.hex
mul_ser12/mul_ser12.hif
mul_ser12/mul_ser12.mmf
mul_ser12/mul_ser12.ndb
mul_ser12/mul_ser12.pin
mul_ser12/mul_ser12.pof
mul_ser12/mul_ser12.rpt
mul_ser12/mul_ser12.scf
mul_ser12/mul_ser12.snf
mul_ser12/mul_ser12.sof
mul_ser12/mul_ser12.ttf
mul_ser12/mul_ser12.v
mul_ser12/U0878453.DLS
mul_ser12/U1385387.DLS
mul_ser12/U9466381.DLS
mul_ser12
mul_ser12/basic_mul12(10).cnf
mul_ser12/basic_mul12(11).cnf
mul_ser12/basic_mul12(12).cnf
mul_ser12/basic_mul12(13).cnf
mul_ser12/basic_mul12(14).cnf
mul_ser12/basic_mul12(15).cnf
mul_ser12/basic_mul12(16).cnf
mul_ser12/basic_mul12(17).cnf
mul_ser12/basic_mul12(2).cnf
mul_ser12/basic_mul12(3).cnf
mul_ser12/basic_mul12(4).cnf
mul_ser12/basic_mul12(5).cnf
mul_ser12/basic_mul12(6).cnf
mul_ser12/basic_mul12(7).cnf
mul_ser12/basic_mul12(8).cnf
mul_ser12/basic_mul12(9).cnf
mul_ser12/basic_mul12.acf
mul_ser12/basic_mul12.cnf
mul_ser12/basic_mul12.fit
mul_ser12/basic_mul12.hex
mul_ser12/basic_mul12.hif
mul_ser12/basic_mul12.mmf
mul_ser12/basic_mul12.ndb
mul_ser12/basic_mul12.pin
mul_ser12/basic_mul12.pof
mul_ser12/basic_mul12.rpt
mul_ser12/basic_mul12.scf
mul_ser12/basic_mul12.snf
mul_ser12/basic_mul12.sof
mul_ser12/basic_mul12.ttf
mul_ser12/basic_mul12.v
mul_ser12/LIB.DLS
mul_ser12/mul_ser12(1).cnf
mul_ser12/mul_ser12(2).cnf
mul_ser12/mul_ser12(3).cnf
mul_ser12/mul_ser12(4).cnf
mul_ser12/mul_ser12(5).cnf
mul_ser12/mul_ser12(6).cnf
mul_ser12/mul_ser12(7).cnf
mul_ser12/mul_ser12.acf
mul_ser12/mul_ser12.cnf
mul_ser12/mul_ser12.fit
mul_ser12/mul_ser12.hex
mul_ser12/mul_ser12.hif
mul_ser12/mul_ser12.mmf
mul_ser12/mul_ser12.ndb
mul_ser12/mul_ser12.pin
mul_ser12/mul_ser12.pof
mul_ser12/mul_ser12.rpt
mul_ser12/mul_ser12.scf
mul_ser12/mul_ser12.snf
mul_ser12/mul_ser12.sof
mul_ser12/mul_ser12.ttf
mul_ser12/mul_ser12.v
mul_ser12/U0878453.DLS
mul_ser12/U1385387.DLS
mul_ser12/U9466381.DLS
mul_ser12
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