文件名称:Design_74LS138
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- 上传时间:2012-11-16
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文件大小:10.73kb
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利用Active-VHDL 来仿真测试74LS138 译码器,74LS138 译码器是3 线-8 线译
码器。-To the use of Active-VHDL simulation test 74LS138 decoder, 74LS138 decoder is a 3-wire-8 line decoder.
码器。-To the use of Active-VHDL simulation test 74LS138 decoder, 74LS138 decoder is a 3-wire-8 line decoder.
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下载文件列表
Design_74LS138/Design_74LS138.adf
Design_74LS138/design_74ls138.lib
Design_74LS138/design_74ls138.mgf
Design_74LS138/Generic/contents.lib~
Design_74LS138/Generic/Design_74LS138.erf
Design_74LS138/Generic/Design_74LS138.wsp
Design_74LS138/Generic/Generic.cfg
Design_74LS138/Generic/sources.sth
Design_74LS138/Generic/wave.dat
Design_74LS138/log/compile.log
Design_74LS138/log/console.log
Design_74LS138/log/find.log
Design_74LS138/log/simulation.log
Design_74LS138/src/Design_74LS138.bak
Design_74LS138/src/Design_74LS138.VHD
Design_74LS138/src/Waveform5.awf
Design_74LS138/Generic
Design_74LS138/log
Design_74LS138/src
Design_74LS138
Design_74LS138/design_74ls138.lib
Design_74LS138/design_74ls138.mgf
Design_74LS138/Generic/contents.lib~
Design_74LS138/Generic/Design_74LS138.erf
Design_74LS138/Generic/Design_74LS138.wsp
Design_74LS138/Generic/Generic.cfg
Design_74LS138/Generic/sources.sth
Design_74LS138/Generic/wave.dat
Design_74LS138/log/compile.log
Design_74LS138/log/console.log
Design_74LS138/log/find.log
Design_74LS138/log/simulation.log
Design_74LS138/src/Design_74LS138.bak
Design_74LS138/src/Design_74LS138.VHD
Design_74LS138/src/Waveform5.awf
Design_74LS138/Generic
Design_74LS138/log
Design_74LS138/src
Design_74LS138
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