文件名称:1_02_FullAdd4
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- 上传时间:2012-11-16
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文件大小:12.45kb
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四位元全加器,為Verilog/VHDL構成的IP模組電路-4bit fulladder
相关搜索: fulladd verilog
(系统自动生成,下载前可以参看下载内容)
下载文件列表
1_02_FullAdd4/FULLADD.V
1_02_FullAdd4/FullAdd4.mpf
1_02_FullAdd4/FULLADD4.V
1_02_FullAdd4/FULLADD4_test.v
1_02_FullAdd4/transcript
1_02_FullAdd4/vsim.wlf
1_02_FullAdd4/work/@full@add/verilog.asm
1_02_FullAdd4/work/@full@add/_primary.dat
1_02_FullAdd4/work/@full@add/_primary.vhd
1_02_FullAdd4/work/@full@add4/verilog.asm
1_02_FullAdd4/work/@full@add4/_primary.dat
1_02_FullAdd4/work/@full@add4/_primary.vhd
1_02_FullAdd4/work/t/verilog.asm
1_02_FullAdd4/work/t/_primary.dat
1_02_FullAdd4/work/t/_primary.vhd
1_02_FullAdd4/work/_info
1_02_FullAdd4/FullAdd4.mpf
1_02_FullAdd4/FULLADD4.V
1_02_FullAdd4/FULLADD4_test.v
1_02_FullAdd4/transcript
1_02_FullAdd4/vsim.wlf
1_02_FullAdd4/work/@full@add/verilog.asm
1_02_FullAdd4/work/@full@add/_primary.dat
1_02_FullAdd4/work/@full@add/_primary.vhd
1_02_FullAdd4/work/@full@add4/verilog.asm
1_02_FullAdd4/work/@full@add4/_primary.dat
1_02_FullAdd4/work/@full@add4/_primary.vhd
1_02_FullAdd4/work/t/verilog.asm
1_02_FullAdd4/work/t/_primary.dat
1_02_FullAdd4/work/t/_primary.vhd
1_02_FullAdd4/work/_info
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