文件名称:SPI_to_I2C
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- 上传时间:2012-11-16
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文件大小:127.03kb
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本设计允许用户使用CPLD作为SPI和I2C接口的桥接芯片。-This design enables an SPI-interface-equipped host to control data flow to
other devices such as an A/D converter, LED controller, audio processor
to read temperature sensors, hardware monitors, and diagnostic sensors,
that are on an I2C interface
other devices such as an A/D converter, LED controller, audio processor
to read temperature sensors, hardware monitors, and diagnostic sensors,
that are on an I2C interface
(系统自动生成,下载前可以参看下载内容)
下载文件列表
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.db_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.eco.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.sld_design_entry.sci
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.asm.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.done
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.dpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.smsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.flow.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.smsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.pin
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.pof
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qarlog
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qsf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qws
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.tan.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.tan.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C_assignment_defaults.qdf
AN486_S
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.db_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.eco.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.sld_design_entry.sci
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.asm.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.done
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.dpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.smsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.fit.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.flow.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.smsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.map.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.pin
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.pof
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qarlog
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qsf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.qws
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.tan.rpt
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.tan.summary
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/SPI_to_I2C_assignment_defaults.qdf
AN486_S
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