文件名称:lesson3-2
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:1.4kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
用一根导线连接在P3.2和GND之间,使P3.2为低电平。那么进入中断
既是第一个二极管闪一下 ,进而 程序继续进行
它与电平触发不一样。
总结:
若采用电平触发方式,外部中断申请触发器的状态随着CPU在每个机器周期采样到的外部
中断输入线的电平变化而变化,这能提高CPU对外部中断中断请求的响应速度。当
外部中断源设定为电平触发方式时,在中断服务程序返回之前,外部中断请求
输入必须是无效的(既变为高电平)否则CPU返回主程序之后会再次响应中断。(也即是主程序不在执行)
所以电平触发方式适合于外部中断以低电平输入而且中断服务程序能清除外部中断请求源。
而若采用跳变沿触发时,外部中断申请触发器能锁存外部中断输入线上的负跳变,即便是
CPU暂时不能响应,中断申请标志也不会丢失,在这种方式里
如果相继连续两次采样,一个机器周期采样到外部中断输入为高,下一个机器
周期采样为低,则置1.中断申请触发器,直到CPU响应此中断时才清0,这样才不会
丢失中断,但输入的负波冲宽度至少保持12个时钟周期才能被CPU采样到,因此适合于
以负脉冲形式输入的外部中断请求。 -With a wire connected between P3.2 and GND, so P3.2 is low. Then enter the interrupt
Is the first diode flash, then the program continues
It is not the same with the trigger level.
Summary:
The use of a level-triggered mode, the external interrupt request flip-flop state with the CPU in each machine cycle to the external
Interrupt input line level changes, which can improve the CPU interrupt request to the external interrupt response time. When the
External interrupt source is set to level-triggered mode, the interrupt service routine returns, the external interrupt request
Input must be invalid (both high) or the CPU returns to the main program after the interrupt again. (That is the main program is not running)
Therefore, the level triggered mode is suitable for low-level input and external interrupt to the interrupt service routine to clear the external interrupt request source.
The use of a transition edge trigger, the external interrupt request flip-flop to latch
既是第一个二极管闪一下 ,进而 程序继续进行
它与电平触发不一样。
总结:
若采用电平触发方式,外部中断申请触发器的状态随着CPU在每个机器周期采样到的外部
中断输入线的电平变化而变化,这能提高CPU对外部中断中断请求的响应速度。当
外部中断源设定为电平触发方式时,在中断服务程序返回之前,外部中断请求
输入必须是无效的(既变为高电平)否则CPU返回主程序之后会再次响应中断。(也即是主程序不在执行)
所以电平触发方式适合于外部中断以低电平输入而且中断服务程序能清除外部中断请求源。
而若采用跳变沿触发时,外部中断申请触发器能锁存外部中断输入线上的负跳变,即便是
CPU暂时不能响应,中断申请标志也不会丢失,在这种方式里
如果相继连续两次采样,一个机器周期采样到外部中断输入为高,下一个机器
周期采样为低,则置1.中断申请触发器,直到CPU响应此中断时才清0,这样才不会
丢失中断,但输入的负波冲宽度至少保持12个时钟周期才能被CPU采样到,因此适合于
以负脉冲形式输入的外部中断请求。 -With a wire connected between P3.2 and GND, so P3.2 is low. Then enter the interrupt
Is the first diode flash, then the program continues
It is not the same with the trigger level.
Summary:
The use of a level-triggered mode, the external interrupt request flip-flop state with the CPU in each machine cycle to the external
Interrupt input line level changes, which can improve the CPU interrupt request to the external interrupt response time. When the
External interrupt source is set to level-triggered mode, the interrupt service routine returns, the external interrupt request
Input must be invalid (both high) or the CPU returns to the main program after the interrupt again. (That is the main program is not running)
Therefore, the level triggered mode is suitable for low-level input and external interrupt to the interrupt service routine to clear the external interrupt request source.
The use of a transition edge trigger, the external interrupt request flip-flop to latch
(系统自动生成,下载前可以参看下载内容)
下载文件列表
lesson3-2.c
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.