文件名称:digitalsecondwatch(VHDL)
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- 上传时间:2008-10-13
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文件大小:1.42kb
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应用VHDL、CPLD、EDA开发软件设计数字系统,能够显著增强设计的灵活性,提高产品的性能,减轻设计的工作量,缩短设计周期。传统的“固定功能集成块+连线”的设计方法正逐步地缩小应用范围,而基于芯片的设计方法正成为电子系统设计的主流。VHDL语言、CPLD/FPGA、EDA开发软件已成为设计复杂数字电路系统的重要工具。-use VHDL, CPLD, EDA software to design digital system, can significantly improve design flexibility, improve product performance, reduce the workload designed to shorten the design cycle. The traditional "fixed-function IC Alliance," The design method is to gradually narrow the scope of application, For the chip design is becoming electronic systems design. VHDL, CPLD / FPGA, EDA software development has become a complex digital circuit design system an important tool.
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