文件名称:exp1.7_adder
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:253.16kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
用VHDL及verylog语言设计一个加法器,可以在Quartus II中仿真-Language Design with VHDL and verylog an adder, in the Quartus II simulation
(系统自动生成,下载前可以参看下载内容)
下载文件列表
exp1.7_adder/adder.qsf
exp1.7_adder/Project/adder.asm.rpt
exp1.7_adder/Project/adder.bsf
exp1.7_adder/Project/adder.done
exp1.7_adder/Project/adder.dpf
exp1.7_adder/Project/adder.fit.rpt
exp1.7_adder/Project/adder.fit.smsg
exp1.7_adder/Project/adder.fit.summary
exp1.7_adder/Project/adder.flow.rpt
exp1.7_adder/Project/adder.map.rpt
exp1.7_adder/Project/adder.map.summary
exp1.7_adder/Project/adder.pin
exp1.7_adder/Project/adder.pof
exp1.7_adder/Project/adder.qpf
exp1.7_adder/Project/adder.qsf
exp1.7_adder/Project/adder.qws
exp1.7_adder/Project/adder.sim.rpt
exp1.7_adder/Project/adder.sof
exp1.7_adder/Project/adder.tan.rpt
exp1.7_adder/Project/adder.tan.summary
exp1.7_adder/Project/adder.tcl
exp1.7_adder/Project/adder.vhd
exp1.7_adder/Project/adder.vwf
exp1.7_adder/Project/Block1.bdf
exp1.7_adder/Project/db/adder.(0).cnf.cdb
exp1.7_adder/Project/db/adder.(0).cnf.hdb
exp1.7_adder/Project/db/adder.asm.qmsg
exp1.7_adder/Project/db/adder.asm_labs.ddb
exp1.7_adder/Project/db/adder.cbx.xml
exp1.7_adder/Project/db/adder.cmp.bpm
exp1.7_adder/Project/db/adder.cmp.cdb
exp1.7_adder/Project/db/adder.cmp.ecobp
exp1.7_adder/Project/db/adder.cmp.hdb
exp1.7_adder/Project/db/adder.cmp.logdb
exp1.7_adder/Project/db/adder.cmp.rdb
exp1.7_adder/Project/db/adder.cmp.tdb
exp1.7_adder/Project/db/adder.cmp0.ddb
exp1.7_adder/Project/db/adder.cmp2.ddb
exp1.7_adder/Project/db/adder.db_info
exp1.7_adder/Project/db/adder.eco.cdb
exp1.7_adder/Project/db/adder.eds_overflow
exp1.7_adder/Project/db/adder.fit.qmsg
exp1.7_adder/Project/db/adder.fnsim.cdb
exp1.7_adder/Project/db/adder.fnsim.hdb
exp1.7_adder/Project/db/adder.fnsim.qmsg
exp1.7_adder/Project/db/adder.hier_info
exp1.7_adder/Project/db/adder.hif
exp1.7_adder/Project/db/adder.map.bpm
exp1.7_adder/Project/db/adder.map.cdb
exp1.7_adder/Project/db/adder.map.ecobp
exp1.7_adder/Project/db/adder.map.hdb
exp1.7_adder/Project/db/adder.map.logdb
exp1.7_adder/Project/db/adder.map.qmsg
exp1.7_adder/Project/db/adder.map_bb.cdb
exp1.7_adder/Project/db/adder.map_bb.hdb
exp1.7_adder/Project/db/adder.map_bb.hdbx
exp1.7_adder/Project/db/adder.map_bb.logdb
exp1.7_adder/Project/db/adder.pre_map.cdb
exp1.7_adder/Project/db/adder.pre_map.hdb
exp1.7_adder/Project/db/adder.psp
exp1.7_adder/Project/db/adder.root_partition.cmp.atm
exp1.7_adder/Project/db/adder.root_partition.cmp.dfp
exp1.7_adder/Project/db/adder.root_partition.cmp.hdbx
exp1.7_adder/Project/db/adder.root_partition.cmp.logdb
exp1.7_adder/Project/db/adder.root_partition.cmp.rcf
exp1.7_adder/Project/db/adder.root_partition.map.atm
exp1.7_adder/Project/db/adder.root_partition.map.hdbx
exp1.7_adder/Project/db/adder.root_partition.map.info
exp1.7_adder/Project/db/adder.rtlv.hdb
exp1.7_adder/Project/db/adder.rtlv_sg.cdb
exp1.7_adder/Project/db/adder.rtlv_sg_swap.cdb
exp1.7_adder/Project/db/adder.sgdiff.cdb
exp1.7_adder/Project/db/adder.sgdiff.hdb
exp1.7_adder/Project/db/adder.signalprobe.cdb
exp1.7_adder/Project/db/adder.sim.cvwf
exp1.7_adder/Project/db/adder.sim.hdb
exp1.7_adder/Project/db/adder.sim.qmsg
exp1.7_adder/Project/db/adder.sim.rdb
exp1.7_adder/Project/db/adder.simfam
exp1.7_adder/Project/db/adder.sld_design_entry.sci
exp1.7_adder/Project/db/adder.sld_design_entry_dsc.sci
exp1.7_adder/Project/db/adder.syn_hier_info
exp1.7_adder/Project/db/adder.tan.qmsg
exp1.7_adder/Project/db/adder.tis_db_list.ddb
exp1.7_adder/Project/db/adder.tmw_info
exp1.7_adder/Project/db/prev_cmp_adder.asm.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.fit.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.map.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.tan.qmsg
exp1.7_adder/Project/db/wed.wsf
exp1.7_adder/Project/pins for adder.txt
exp1.7_adder/Verilog File/adder.v
exp1.7_adder/Verilog File/adder_TB.v
exp1.7_adder/VHDL File/adder.vhd
exp1.7_adder/Project/db
exp1.7_adder/Project
exp1.7_adder/Verilog File
exp1.7_adder/VHDL File
exp1.7_adder
exp1.7_adder/Project/adder.asm.rpt
exp1.7_adder/Project/adder.bsf
exp1.7_adder/Project/adder.done
exp1.7_adder/Project/adder.dpf
exp1.7_adder/Project/adder.fit.rpt
exp1.7_adder/Project/adder.fit.smsg
exp1.7_adder/Project/adder.fit.summary
exp1.7_adder/Project/adder.flow.rpt
exp1.7_adder/Project/adder.map.rpt
exp1.7_adder/Project/adder.map.summary
exp1.7_adder/Project/adder.pin
exp1.7_adder/Project/adder.pof
exp1.7_adder/Project/adder.qpf
exp1.7_adder/Project/adder.qsf
exp1.7_adder/Project/adder.qws
exp1.7_adder/Project/adder.sim.rpt
exp1.7_adder/Project/adder.sof
exp1.7_adder/Project/adder.tan.rpt
exp1.7_adder/Project/adder.tan.summary
exp1.7_adder/Project/adder.tcl
exp1.7_adder/Project/adder.vhd
exp1.7_adder/Project/adder.vwf
exp1.7_adder/Project/Block1.bdf
exp1.7_adder/Project/db/adder.(0).cnf.cdb
exp1.7_adder/Project/db/adder.(0).cnf.hdb
exp1.7_adder/Project/db/adder.asm.qmsg
exp1.7_adder/Project/db/adder.asm_labs.ddb
exp1.7_adder/Project/db/adder.cbx.xml
exp1.7_adder/Project/db/adder.cmp.bpm
exp1.7_adder/Project/db/adder.cmp.cdb
exp1.7_adder/Project/db/adder.cmp.ecobp
exp1.7_adder/Project/db/adder.cmp.hdb
exp1.7_adder/Project/db/adder.cmp.logdb
exp1.7_adder/Project/db/adder.cmp.rdb
exp1.7_adder/Project/db/adder.cmp.tdb
exp1.7_adder/Project/db/adder.cmp0.ddb
exp1.7_adder/Project/db/adder.cmp2.ddb
exp1.7_adder/Project/db/adder.db_info
exp1.7_adder/Project/db/adder.eco.cdb
exp1.7_adder/Project/db/adder.eds_overflow
exp1.7_adder/Project/db/adder.fit.qmsg
exp1.7_adder/Project/db/adder.fnsim.cdb
exp1.7_adder/Project/db/adder.fnsim.hdb
exp1.7_adder/Project/db/adder.fnsim.qmsg
exp1.7_adder/Project/db/adder.hier_info
exp1.7_adder/Project/db/adder.hif
exp1.7_adder/Project/db/adder.map.bpm
exp1.7_adder/Project/db/adder.map.cdb
exp1.7_adder/Project/db/adder.map.ecobp
exp1.7_adder/Project/db/adder.map.hdb
exp1.7_adder/Project/db/adder.map.logdb
exp1.7_adder/Project/db/adder.map.qmsg
exp1.7_adder/Project/db/adder.map_bb.cdb
exp1.7_adder/Project/db/adder.map_bb.hdb
exp1.7_adder/Project/db/adder.map_bb.hdbx
exp1.7_adder/Project/db/adder.map_bb.logdb
exp1.7_adder/Project/db/adder.pre_map.cdb
exp1.7_adder/Project/db/adder.pre_map.hdb
exp1.7_adder/Project/db/adder.psp
exp1.7_adder/Project/db/adder.root_partition.cmp.atm
exp1.7_adder/Project/db/adder.root_partition.cmp.dfp
exp1.7_adder/Project/db/adder.root_partition.cmp.hdbx
exp1.7_adder/Project/db/adder.root_partition.cmp.logdb
exp1.7_adder/Project/db/adder.root_partition.cmp.rcf
exp1.7_adder/Project/db/adder.root_partition.map.atm
exp1.7_adder/Project/db/adder.root_partition.map.hdbx
exp1.7_adder/Project/db/adder.root_partition.map.info
exp1.7_adder/Project/db/adder.rtlv.hdb
exp1.7_adder/Project/db/adder.rtlv_sg.cdb
exp1.7_adder/Project/db/adder.rtlv_sg_swap.cdb
exp1.7_adder/Project/db/adder.sgdiff.cdb
exp1.7_adder/Project/db/adder.sgdiff.hdb
exp1.7_adder/Project/db/adder.signalprobe.cdb
exp1.7_adder/Project/db/adder.sim.cvwf
exp1.7_adder/Project/db/adder.sim.hdb
exp1.7_adder/Project/db/adder.sim.qmsg
exp1.7_adder/Project/db/adder.sim.rdb
exp1.7_adder/Project/db/adder.simfam
exp1.7_adder/Project/db/adder.sld_design_entry.sci
exp1.7_adder/Project/db/adder.sld_design_entry_dsc.sci
exp1.7_adder/Project/db/adder.syn_hier_info
exp1.7_adder/Project/db/adder.tan.qmsg
exp1.7_adder/Project/db/adder.tis_db_list.ddb
exp1.7_adder/Project/db/adder.tmw_info
exp1.7_adder/Project/db/prev_cmp_adder.asm.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.fit.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.map.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.qmsg
exp1.7_adder/Project/db/prev_cmp_adder.tan.qmsg
exp1.7_adder/Project/db/wed.wsf
exp1.7_adder/Project/pins for adder.txt
exp1.7_adder/Verilog File/adder.v
exp1.7_adder/Verilog File/adder_TB.v
exp1.7_adder/VHDL File/adder.vhd
exp1.7_adder/Project/db
exp1.7_adder/Project
exp1.7_adder/Verilog File
exp1.7_adder/VHDL File
exp1.7_adder
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.