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文件名称:6c8ec37a-3fd5-41e1-b3cf-a88af5f7c888

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    181.59kb
  • 已下载：
    0次
  • 提 供 者：
    靖****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

《华为静态时序分析与逻辑设计》《华为静态时序分析与逻辑设计》-Huawei static timing analysis and logic designHuawei static timing analysis and logic design
(系统自动生成,下载前可以参看下载内容)

下载文件列表

EX2/keyscanverilog/db/prev_cmp_sw_debounce.asm.qmsg
EX2/keyscanverilog/db/prev_cmp_sw_debounce.fit.qmsg
EX2/keyscanverilog/db/prev_cmp_sw_debounce.map.qmsg
EX2/keyscanverilog/db/prev_cmp_sw_debounce.qmsg
EX2/keyscanverilog/db/prev_cmp_sw_debounce.tan.qmsg
EX2/keyscanverilog/db/sw_debounce.(0).cnf.cdb
EX2/keyscanverilog/db/sw_debounce.(0).cnf.hdb
EX2/keyscanverilog/db/sw_debounce.asm.qmsg
EX2/keyscanverilog/db/sw_debounce.asm_labs.ddb
EX2/keyscanverilog/db/sw_debounce.cbx.xml
EX2/keyscanverilog/db/sw_debounce.cmp.cdb
EX2/keyscanverilog/db/sw_debounce.cmp.hdb
EX2/keyscanverilog/db/sw_debounce.cmp.kpt
EX2/keyscanverilog/db/sw_debounce.cmp.logdb
EX2/keyscanverilog/db/sw_debounce.cmp.rdb
EX2/keyscanverilog/db/sw_debounce.cmp.tdb
EX2/keyscanverilog/db/sw_debounce.cmp0.ddb
EX2/keyscanverilog/db/sw_debounce.db_info
EX2/keyscanverilog/db/sw_debounce.eco.cdb
EX2/keyscanverilog/db/sw_debounce.fit.qmsg
EX2/keyscanverilog/db/sw_debounce.hier_info
EX2/keyscanverilog/db/sw_debounce.hif
EX2/keyscanverilog/db/sw_debounce.lpc.html
EX2/keyscanverilog/db/sw_debounce.lpc.rdb
EX2/keyscanverilog/db/sw_debounce.lpc.txt
EX2/keyscanverilog/db/sw_debounce.map.cdb
EX2/keyscanverilog/db/sw_debounce.map.hdb
EX2/keyscanverilog/db/sw_debounce.map.logdb
EX2/keyscanverilog/db/sw_debounce.map.qmsg
EX2/keyscanverilog/db/sw_debounce.pre_map.cdb
EX2/keyscanverilog/db/sw_debounce.pre_map.hdb
EX2/keyscanverilog/db/sw_debounce.rtlv.hdb
EX2/keyscanverilog/db/sw_debounce.rtlv_sg.cdb
EX2/keyscanverilog/db/sw_debounce.rtlv_sg_swap.cdb
EX2/keyscanverilog/db/sw_debounce.sgdiff.cdb
EX2/keyscanverilog/db/sw_debounce.sgdiff.hdb
EX2/keyscanverilog/db/sw_debounce.sld_design_entry.sci
EX2/keyscanverilog/db/sw_debounce.sld_design_entry_dsc.sci
EX2/keyscanverilog/db/sw_debounce.syn_hier_info
EX2/keyscanverilog/db/sw_debounce.tan.qmsg
EX2/keyscanverilog/db/sw_debounce.tis_db_list.ddb
EX2/keyscanverilog/db/sw_debounce_global_asgn_op.abo
EX2/keyscanverilog/incremental_db/compiled_partitions/sw_debounce.root_partition.map.kpt
EX2/keyscanverilog/incremental_db/README
EX2/keyscanverilog/sw_debounce.asm.rpt
EX2/keyscanverilog/sw_debounce.cdf
EX2/keyscanverilog/sw_debounce.done
EX2/keyscanverilog/sw_debounce.dpf
EX2/keyscanverilog/sw_debounce.fit.rpt
EX2/keyscanverilog/sw_debounce.fit.smsg
EX2/keyscanverilog/sw_debounce.fit.summary
EX2/keyscanverilog/sw_debounce.flow.rpt
EX2/keyscanverilog/sw_debounce.map.rpt
EX2/keyscanverilog/sw_debounce.map.summary
EX2/keyscanverilog/sw_debounce.pin
EX2/keyscanverilog/sw_debounce.pof
EX2/keyscanverilog/sw_debounce.qpf
EX2/keyscanverilog/sw_debounce.qsf
EX2/keyscanverilog/sw_debounce.qws
EX2/keyscanverilog/sw_debounce.tan.rpt
EX2/keyscanverilog/sw_debounce.tan.summary
EX2/keyscanverilog/sw_debounce.v
EX2/keyscanverilog/sw_debounce.v.bak
EX2/keyscanverilog/sw_debounce_assignment_defaults.qdf
EX2/keyscanverilog/transcript
EX2/keyscanverilog/incremental_db/compiled_partitions
EX2/keyscanverilog/db
EX2/keyscanverilog/incremental_db
EX2/keyscanverilog
EX2

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