文件名称:Chapter-6
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练习六在verilog hdl中使用函数317
-• Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed on Altera’s UP2 board are included in “Quartus UP2 Designs.zip”
• The OVL directory has OVL library version 1.0 and its documentations
• In the Software directory, the Altera directory contains Quartus II, related tools, and Altera device specifications. Please connect to www.altera.com and then click on “University Program” to obtain a license for Quartus II Web Edition.
• In the Software directory, The MentorGraphics directory has the ModelSim-Altera simulation program. Please connect to www.altera.com and then click on “University Program” to obtain a license for ModelSim-Altera.
-• Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed on Altera’s UP2 board are included in “Quartus UP2 Designs.zip”
• The OVL directory has OVL library version 1.0 and its documentations
• In the Software directory, the Altera directory contains Quartus II, related tools, and Altera device specifications. Please connect to www.altera.com and then click on “University Program” to obtain a license for Quartus II Web Edition.
• In the Software directory, The MentorGraphics directory has the ModelSim-Altera simulation program. Please connect to www.altera.com and then click on “University Program” to obtain a license for ModelSim-Altera.
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下载文件列表
Chapter 6/moore_detector.v
Chapter 6/moore_detector2.v
Chapter 6/test1.v
Chapter 6/test10.v
Chapter 6/test11.v
Chapter 6/test12.v
Chapter 6/test2.v
Chapter 6/test3.v
Chapter 6/test6.v
Chapter 6/test9.v
Chapter 6
Chapter 6/moore_detector2.v
Chapter 6/test1.v
Chapter 6/test10.v
Chapter 6/test11.v
Chapter 6/test12.v
Chapter 6/test2.v
Chapter 6/test3.v
Chapter 6/test6.v
Chapter 6/test9.v
Chapter 6
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