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文件名称:vtvt_tsmc180_release

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2012-11-16
  • 文件大小：
    4.78mb
  • 已下载：
    1次
  • 提 供 者：
    Alex *****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

弗及利亚理工开发的T$MC180nm数字开发库-T$MC 180nm digital lib from VT
(系统自动生成,下载前可以参看下载内容)

下载文件列表

vtvt_tsmc180_release/README_TSMC180.pdf
vtvt_tsmc180_release/vtvt_tsmc180.tf
vtvt_tsmc180_release/divaDRC.rul
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180_nolabel.tar.gz
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180.tar.gz
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_nolabel.map
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/README
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_SocE2df2.map
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180_StreamIn.map
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/cdsinfo.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/symbol/symbol.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/symbol/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/symbol/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/symbol/symbol.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/schematic/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/schematic/sch.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/schematic/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/schematic/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/layout/layout.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/layout/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/layout/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/aborc/layout/layout.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/layout/layout.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/layout/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/layout/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/layout/layout.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/schematic/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/schematic/sch.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/schematic/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/schematic/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/schematic/sch.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/symbol/symbol.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/symbol/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/symbol/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/inv_1/symbol/symbol.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/layout/layout.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/layout/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/layout/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/layout/layout.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/schematic/sch.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/schematic/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/schematic/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/schematic/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/schematic/sch.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/symbol/symbol.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/symbol/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/symbol/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/nand2_1/symbol/symbol.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/prop.xx
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/layout/layout.cdb
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/layout/master.tag
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/layout/pc.db
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/layout/layout.cd%
vtvt_tsmc180_release/Cadence_Libraries/Cadence_Libraries/vtvt_tsmc180/buf_1/schematic/master.tag
vtvt_tsmc180_re

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