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文件名称:dpramcore

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    26.74mb
  • 已下载：
    0次
  • 提 供 者：
    g****
  • 相关连接：
    无
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    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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基于altera fpga的dpram ipcore 设计，包含整个工程和modelsim仿真文件。读写地址及读写使能是通过数据产生模块来产生。-Altera fpga dpram ipcore design, including engineering and modelsim simulation file. Read and write address and read and write is through the data module.
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下载文件列表

dpramcore/datagenerate.v.bak
dpramcore/db/altsyncram_13s1.tdf
dpramcore/db/altsyncram_3gi1.tdf
dpramcore/db/altsyncram_lqr1.tdf
dpramcore/db/dpram_core.(0).cnf.cdb
dpramcore/db/dpram_core.(0).cnf.hdb
dpramcore/db/dpram_core.(1).cnf.cdb
dpramcore/db/dpram_core.(1).cnf.hdb
dpramcore/db/dpram_core.(2).cnf.cdb
dpramcore/db/dpram_core.(2).cnf.hdb
dpramcore/db/dpram_core.(3).cnf.cdb
dpramcore/db/dpram_core.(3).cnf.hdb
dpramcore/db/dpram_core.(4).cnf.cdb
dpramcore/db/dpram_core.(4).cnf.hdb
dpramcore/db/dpram_core.(5).cnf.cdb
dpramcore/db/dpram_core.(5).cnf.hdb
dpramcore/db/dpram_core.(6).cnf.cdb
dpramcore/db/dpram_core.(6).cnf.hdb
dpramcore/db/dpram_core.amm.cdb
dpramcore/db/dpram_core.asm.qmsg
dpramcore/db/dpram_core.asm.rdb
dpramcore/db/dpram_core.asm_labs.ddb
dpramcore/db/dpram_core.cbx.xml
dpramcore/db/dpram_core.cmp.bpm
dpramcore/db/dpram_core.cmp.cdb
dpramcore/db/dpram_core.cmp.hdb
dpramcore/db/dpram_core.cmp.kpt
dpramcore/db/dpram_core.cmp.logdb
dpramcore/db/dpram_core.cmp.rdb
dpramcore/db/dpram_core.cmp2.ddb
dpramcore/db/dpram_core.cmp_merge.kpt
dpramcore/db/dpram_core.db_info
dpramcore/db/dpram_core.eda.qmsg
dpramcore/db/dpram_core.fit.qmsg
dpramcore/db/dpram_core.hier_info
dpramcore/db/dpram_core.hif
dpramcore/db/dpram_core.idb.cdb
dpramcore/db/dpram_core.lpc.html
dpramcore/db/dpram_core.lpc.rdb
dpramcore/db/dpram_core.lpc.txt
dpramcore/db/dpram_core.map.bpm
dpramcore/db/dpram_core.map.cdb
dpramcore/db/dpram_core.map.hdb
dpramcore/db/dpram_core.map.kpt
dpramcore/db/dpram_core.map.logdb
dpramcore/db/dpram_core.map.qmsg
dpramcore/db/dpram_core.map_bb.cdb
dpramcore/db/dpram_core.map_bb.hdb
dpramcore/db/dpram_core.map_bb.logdb
dpramcore/db/dpram_core.pre_map.cdb
dpramcore/db/dpram_core.pre_map.hdb
dpramcore/db/dpram_core.rpp.qmsg
dpramcore/db/dpram_core.rtlv.hdb
dpramcore/db/dpram_core.rtlv_sg.cdb
dpramcore/db/dpram_core.rtlv_sg_swap.cdb
dpramcore/db/dpram_core.sgate.rvd
dpramcore/db/dpram_core.sgate_sm.rvd
dpramcore/db/dpram_core.sgdiff.cdb
dpramcore/db/dpram_core.sgdiff.hdb
dpramcore/db/dpram_core.sld_design_entry.sci
dpramcore/db/dpram_core.sld_design_entry_dsc.sci
dpramcore/db/dpram_core.smart_action.txt
dpramcore/db/dpram_core.sta.qmsg
dpramcore/db/dpram_core.sta.rdb
dpramcore/db/dpram_core.sta_cmp.6_slow_1200mv_85c.tdb
dpramcore/db/dpram_core.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
dpramcore/db/dpram_core.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
dpramcore/db/dpram_core.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
dpramcore/db/dpram_core.syn_hier_info
dpramcore/db/dpram_core.tiscmp.fast_1200mv_0c.ddb
dpramcore/db/dpram_core.tiscmp.slow_1200mv_0c.ddb
dpramcore/db/dpram_core.tiscmp.slow_1200mv_85c.ddb
dpramcore/db/dpram_core.tis_db_list.ddb
dpramcore/db/dpram_core.tmw_info
dpramcore/db/logic_util_heursitic.dat
dpramcore/db/prev_cmp_dpram_core.qmsg
dpramcore/dpram.bsf
dpramcore/dpram.qip
dpramcore/dpram.v
dpramcore/dpram_bb.v
dpramcore/dpram_core.asm.rpt
dpramcore/dpram_core.done
dpramcore/dpram_core.eda.rpt
dpramcore/dpram_core.fit.rpt
dpramcore/dpram_core.fit.smsg
dpramcore/dpram_core.fit.summary
dpramcore/dpram_core.flow.rpt
dpramcore/dpram_core.map.rpt
dpramcore/dpram_core.map.summary
dpramcore/dpram_core.pin
dpramcore/dpram_core.pof
dpramcore/dpram_core.qpf
dpramcore/dpram_core.qsf
dpramcore/dpram_core.sof
dpramcore/dpram_core.sta.rpt
dpramcore/dpram_core.sta.summary
dpramcore/dpram_core.v
dpramcore/dpram_core.v.bak
dpramcore/dpram_core_nativelink_simulation.rpt
dpramcore/dpram_inst.v
dpramcore/dpram_syn.v
dpramcore/greybox_tmp/cbx_args.txt
dpramcore/incremental_db/compiled_partitions/dpram_core.db_info
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.cbp
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.cdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.dfp
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.hdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.kpt
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.logdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.rcfdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.cmp.re.rcfdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.map.cbp
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.map.cdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.map.dpi
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.map.hdb
dpramcore/incremental_db/compiled_partitions/dpram_core.root_partition.map.kpt
dpramcore/incremental_db/README
dpramcore/simulation/modelsim/datagenerate.v
dpramcore/simulation/modelsim/datagenerate.v.bak
dpramcore/simulation/modelsim/dpram_core.sft
dpramcore/simulation/modelsim/dpram_core.vo
dpramcore/simulation/modelsim/dpram_core.vt
dpramcore/simulation/modelsim/dpram_core.vt.bak
dpramcore/simulation/modelsim/dpram_core_6_1200mv_0c_slow.vo
dpramcore/simulation/modelsim/dpram_core_6_1200mv_0c_v_slow.sdo
dpramcore/simulation/modelsim/dpram_core_6_1200mv_85c_s

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