文件名称:spi_slave_latest.tar
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SPI IO 核,非常好用!SPI IP core ,good for use,可用于SoC以及其他模块-SPI IP core ,good for use
(系统自动生成,下载前可以参看下载内容)
下载文件列表
spi_slave/
spi_slave/branches/
spi_slave/tags/
spi_slave/tags/V100/
spi_slave/tags/V100/pcore/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/gray2bin.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/bin2gray.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_if.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_spi_slave.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/fifo.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/gray_adder.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/fifo_prog_flags.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/shift_register.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_m_if.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/ram.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/irq_ctl.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_spi_slave_pack.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.pao
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.ucf
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.mpd
spi_slave/tags/V100/doc/
spi_slave/tags/V100/doc/src/
spi_slave/tags/V100/doc/src/opb_spi_slave.tex
spi_slave/tags/V100/doc/src/content/
spi_slave/tags/V100/doc/src/content/Titel.tex
spi_slave/tags/V100/doc/src/content/spec.tex
spi_slave/tags/V100/doc/src/content/Z-Anhang.tex
spi_slave/tags/V100/doc/src/Grafik/
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.pdf
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.odg
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.eps
spi_slave/tags/V100/doc/src/opb_spi_slave.tcp
spi_slave/tags/V100/doc/opb_spi_slave.pdf
spi_slave/web_uploads/
spi_slave/trunk/
spi_slave/trunk/bench/
spi_slave/trunk/bench/vhdl/
spi_slave/trunk/bench/vhdl/images-body.vhd
spi_slave/trunk/bench/vhdl/bin2gray_tb.vhd
spi_slave/trunk/bench/vhdl/txt_util.vhd
spi_slave/trunk/bench/vhdl/opb_m_if_tb.vhd
spi_slave/trunk/bench/vhdl/opb_if_tb.vhd
spi_slave/trunk/bench/vhdl/opb_spi_slave_tb.vhd
spi_slave/trunk/bench/vhdl/shift_register_tb.vhd
spi_slave/trunk/bench/vhdl/crc_core_tb.vhd
spi_slave/trunk/bench/vhdl/tx_fifo_emu.vhd
spi_slave/trunk/bench/vhdl/fifo_tb.vhd
spi_slave/trunk/bench/vhdl/rx_fifo_emu.vhd
spi_slave/trunk/sim/
spi_slave/trunk/sim/rtl_sim/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_si
spi_slave/branches/
spi_slave/tags/
spi_slave/tags/V100/
spi_slave/tags/V100/pcore/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/gray2bin.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/bin2gray.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_if.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_spi_slave.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/fifo.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/gray_adder.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/fifo_prog_flags.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/shift_register.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_m_if.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/ram.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/irq_ctl.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/hdl/vhdl/opb_spi_slave_pack.vhd
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.pao
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.ucf
spi_slave/tags/V100/pcore/opb_spi_slave_v1_00_a/data/opb_spi_slave_v2_1_0.mpd
spi_slave/tags/V100/doc/
spi_slave/tags/V100/doc/src/
spi_slave/tags/V100/doc/src/opb_spi_slave.tex
spi_slave/tags/V100/doc/src/content/
spi_slave/tags/V100/doc/src/content/Titel.tex
spi_slave/tags/V100/doc/src/content/spec.tex
spi_slave/tags/V100/doc/src/content/Z-Anhang.tex
spi_slave/tags/V100/doc/src/Grafik/
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.pdf
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.odg
spi_slave/tags/V100/doc/src/Grafik/block_diagramm.eps
spi_slave/tags/V100/doc/src/opb_spi_slave.tcp
spi_slave/tags/V100/doc/opb_spi_slave.pdf
spi_slave/web_uploads/
spi_slave/trunk/
spi_slave/trunk/bench/
spi_slave/trunk/bench/vhdl/
spi_slave/trunk/bench/vhdl/images-body.vhd
spi_slave/trunk/bench/vhdl/bin2gray_tb.vhd
spi_slave/trunk/bench/vhdl/txt_util.vhd
spi_slave/trunk/bench/vhdl/opb_m_if_tb.vhd
spi_slave/trunk/bench/vhdl/opb_if_tb.vhd
spi_slave/trunk/bench/vhdl/opb_spi_slave_tb.vhd
spi_slave/trunk/bench/vhdl/shift_register_tb.vhd
spi_slave/trunk/bench/vhdl/crc_core_tb.vhd
spi_slave/trunk/bench/vhdl/tx_fifo_emu.vhd
spi_slave/trunk/bench/vhdl/fifo_tb.vhd
spi_slave/trunk/bench/vhdl/rx_fifo_emu.vhd
spi_slave/trunk/sim/
spi_slave/trunk/sim/rtl_sim/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_if/opb_if_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/crc_core/crc_core_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/fifo/fifo_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_m_if/opb_m_if_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/irq_ctl/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/grey_adder/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_s.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_c.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/opb_spi_slave/opb_spi_slave_tb_w.do
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/work/
spi_slave/trunk/sim/rtl_sim/modelsim_sim/run/shift_register/work/.keepdir
spi_slave/trunk/sim/rtl_sim/modelsim_si
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