文件名称:UART
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- 上传时间:2012-11-16
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文件大小:1.41mb
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已下载:0次
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相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
异步串口收发程序,波特率4800。VHDL写成。在ALTERA开发板上测试成功。-This is a UART program, with a fixed 4800bps. Tested successfully on an Altera divice.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UART_RXD/FPGA_RXD/db/logic_util_heursitic.dat
UART_RXD/FPGA_RXD/db/prev_cmp_urm.qmsg
UART_RXD/FPGA_RXD/db/urm.(0).cnf.cdb
UART_RXD/FPGA_RXD/db/urm.(0).cnf.hdb
UART_RXD/FPGA_RXD/db/urm.cbx.xml
UART_RXD/FPGA_RXD/db/urm.cmp.rdb
UART_RXD/FPGA_RXD/db/urm.cmp_merge.kpt
UART_RXD/FPGA_RXD/db/urm.db_info
UART_RXD/FPGA_RXD/db/urm.hier_info
UART_RXD/FPGA_RXD/db/urm.hif
UART_RXD/FPGA_RXD/db/urm.lpc.html
UART_RXD/FPGA_RXD/db/urm.lpc.rdb
UART_RXD/FPGA_RXD/db/urm.lpc.txt
UART_RXD/FPGA_RXD/db/urm.map.bpm
UART_RXD/FPGA_RXD/db/urm.map.cdb
UART_RXD/FPGA_RXD/db/urm.map.hdb
UART_RXD/FPGA_RXD/db/urm.map.kpt
UART_RXD/FPGA_RXD/db/urm.map.logdb
UART_RXD/FPGA_RXD/db/urm.map.qmsg
UART_RXD/FPGA_RXD/db/urm.map_bb.cdb
UART_RXD/FPGA_RXD/db/urm.map_bb.hdb
UART_RXD/FPGA_RXD/db/urm.map_bb.logdb
UART_RXD/FPGA_RXD/db/urm.pre_map.cdb
UART_RXD/FPGA_RXD/db/urm.pre_map.hdb
UART_RXD/FPGA_RXD/db/urm.rpp.qmsg
UART_RXD/FPGA_RXD/db/urm.rtlv.hdb
UART_RXD/FPGA_RXD/db/urm.rtlv_sg.cdb
UART_RXD/FPGA_RXD/db/urm.rtlv_sg_swap.cdb
UART_RXD/FPGA_RXD/db/urm.sgate.rvd
UART_RXD/FPGA_RXD/db/urm.sgate_sm.rvd
UART_RXD/FPGA_RXD/db/urm.sgdiff.cdb
UART_RXD/FPGA_RXD/db/urm.sgdiff.hdb
UART_RXD/FPGA_RXD/db/urm.sld_design_entry.sci
UART_RXD/FPGA_RXD/db/urm.sld_design_entry_dsc.sci
UART_RXD/FPGA_RXD/db/urm.smart_action.txt
UART_RXD/FPGA_RXD/db/urm.syn_hier_info
UART_RXD/FPGA_RXD/db/urm.tis_db_list.ddb
UART_RXD/FPGA_RXD/db/urm.tmw_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.db_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.cdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.dpi
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.cdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.hb_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.hdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.sig
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.kpt
UART_RXD/FPGA_RXD/incremental_db/README
UART_RXD/FPGA_RXD/urm.done
UART_RXD/FPGA_RXD/urm.flow.rpt
UART_RXD/FPGA_RXD/urm.map.rpt
UART_RXD/FPGA_RXD/urm.map.summary
UART_RXD/FPGA_RXD/urm.qpf
UART_RXD/FPGA_RXD/urm.qsf
UART_RXD/FPGA_RXD/urm.vhd
UART_RXD/FPGA_RXD/urm.vhd.bak
UART_RXD/FPGA_urflp/db/logic_util_heursitic.dat
UART_RXD/FPGA_urflp/db/prev_cmp_urst.qmsg
UART_RXD/FPGA_urflp/db/urst.(0).cnf.cdb
UART_RXD/FPGA_urflp/db/urst.(0).cnf.hdb
UART_RXD/FPGA_urflp/db/urst.cbx.xml
UART_RXD/FPGA_urflp/db/urst.cmp.rdb
UART_RXD/FPGA_urflp/db/urst.cmp_merge.kpt
UART_RXD/FPGA_urflp/db/urst.db_info
UART_RXD/FPGA_urflp/db/urst.hier_info
UART_RXD/FPGA_urflp/db/urst.hif
UART_RXD/FPGA_urflp/db/urst.lpc.html
UART_RXD/FPGA_urflp/db/urst.lpc.rdb
UART_RXD/FPGA_urflp/db/urst.lpc.txt
UART_RXD/FPGA_urflp/db/urst.map.bpm
UART_RXD/FPGA_urflp/db/urst.map.cdb
UART_RXD/FPGA_urflp/db/urst.map.hdb
UART_RXD/FPGA_urflp/db/urst.map.kpt
UART_RXD/FPGA_urflp/db/urst.map.logdb
UART_RXD/FPGA_urflp/db/urst.map.qmsg
UART_RXD/FPGA_urflp/db/urst.map_bb.cdb
UART_RXD/FPGA_urflp/db/urst.map_bb.hdb
UART_RXD/FPGA_urflp/db/urst.map_bb.logdb
UART_RXD/FPGA_urflp/db/urst.pre_map.cdb
UART_RXD/FPGA_urflp/db/urst.pre_map.hdb
UART_RXD/FPGA_urflp/db/urst.rpp.qmsg
UART_RXD/FPGA_urflp/db/urst.rtlv.hdb
UART_RXD/FPGA_urflp/db/urst.rtlv_sg.cdb
UART_RXD/FPGA_urflp/db/urst.rtlv_sg_swap.cdb
UART_RXD/FPGA_urflp/db/urst.sgate.rvd
UART_RXD/FPGA_urflp/db/urst.sgate_sm.rvd
UART_RXD/FPGA_urflp/db/urst.sgdiff.cdb
UART_RXD/FPGA_urflp/db/urst.sgdiff.hdb
UART_RXD/FPGA_urflp/db/urst.sld_design_entry.sci
UART_RXD/FPGA_urflp/db/urst.sld_design_entry_dsc.sci
UART_RXD/FPGA_urflp/db/urst.smart_action.txt
UART_RXD/FPGA_urflp/db/urst.syn_hier_info
UART_RXD/FPGA_urflp/db/urst.tis_db_list.ddb
UART_RXD/FPGA_urflp/db/urst.tmw_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.db_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.cdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.dpi
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.cdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.hb_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.hdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.sig
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.kpt
UART_RXD/FPGA_urflp/incremental_db/README
UART_RXD/FPGA_urflp/urst.done
UART_RXD/FPGA_urflp/urst.flow.rpt
UART_RXD/FPGA_urflp/urst.map.rpt
UART_RXD/FPGA_urflp/urst.map.summary
UART_RXD/FPGA_urflp/urst.qpf
UART_RXD/FPGA_urflp/urst.qsf
UART_RXD/FPGA_urflp/urst.vhd
UART_RXD/FPGA_urflp/urst.vhd.bak
UART_RXD/FPGA_urtopm/db/logic_util_heursitic.dat
UART_RXD/FPGA_urtopm/db/prev_cmp_urtpm.qmsg
UART_RXD/FPGA_urtopm/db/urtpm.(0).cnf.cdb
UART_RXD/FPGA_urtopm/db/urtpm.(0).cnf.hdb
UART_RXD/FPGA_RXD/db/prev_cmp_urm.qmsg
UART_RXD/FPGA_RXD/db/urm.(0).cnf.cdb
UART_RXD/FPGA_RXD/db/urm.(0).cnf.hdb
UART_RXD/FPGA_RXD/db/urm.cbx.xml
UART_RXD/FPGA_RXD/db/urm.cmp.rdb
UART_RXD/FPGA_RXD/db/urm.cmp_merge.kpt
UART_RXD/FPGA_RXD/db/urm.db_info
UART_RXD/FPGA_RXD/db/urm.hier_info
UART_RXD/FPGA_RXD/db/urm.hif
UART_RXD/FPGA_RXD/db/urm.lpc.html
UART_RXD/FPGA_RXD/db/urm.lpc.rdb
UART_RXD/FPGA_RXD/db/urm.lpc.txt
UART_RXD/FPGA_RXD/db/urm.map.bpm
UART_RXD/FPGA_RXD/db/urm.map.cdb
UART_RXD/FPGA_RXD/db/urm.map.hdb
UART_RXD/FPGA_RXD/db/urm.map.kpt
UART_RXD/FPGA_RXD/db/urm.map.logdb
UART_RXD/FPGA_RXD/db/urm.map.qmsg
UART_RXD/FPGA_RXD/db/urm.map_bb.cdb
UART_RXD/FPGA_RXD/db/urm.map_bb.hdb
UART_RXD/FPGA_RXD/db/urm.map_bb.logdb
UART_RXD/FPGA_RXD/db/urm.pre_map.cdb
UART_RXD/FPGA_RXD/db/urm.pre_map.hdb
UART_RXD/FPGA_RXD/db/urm.rpp.qmsg
UART_RXD/FPGA_RXD/db/urm.rtlv.hdb
UART_RXD/FPGA_RXD/db/urm.rtlv_sg.cdb
UART_RXD/FPGA_RXD/db/urm.rtlv_sg_swap.cdb
UART_RXD/FPGA_RXD/db/urm.sgate.rvd
UART_RXD/FPGA_RXD/db/urm.sgate_sm.rvd
UART_RXD/FPGA_RXD/db/urm.sgdiff.cdb
UART_RXD/FPGA_RXD/db/urm.sgdiff.hdb
UART_RXD/FPGA_RXD/db/urm.sld_design_entry.sci
UART_RXD/FPGA_RXD/db/urm.sld_design_entry_dsc.sci
UART_RXD/FPGA_RXD/db/urm.smart_action.txt
UART_RXD/FPGA_RXD/db/urm.syn_hier_info
UART_RXD/FPGA_RXD/db/urm.tis_db_list.ddb
UART_RXD/FPGA_RXD/db/urm.tmw_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.db_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.cdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.dpi
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.cdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.hb_info
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.hdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hbdb.sig
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.hdb
UART_RXD/FPGA_RXD/incremental_db/compiled_partitions/urm.root_partition.map.kpt
UART_RXD/FPGA_RXD/incremental_db/README
UART_RXD/FPGA_RXD/urm.done
UART_RXD/FPGA_RXD/urm.flow.rpt
UART_RXD/FPGA_RXD/urm.map.rpt
UART_RXD/FPGA_RXD/urm.map.summary
UART_RXD/FPGA_RXD/urm.qpf
UART_RXD/FPGA_RXD/urm.qsf
UART_RXD/FPGA_RXD/urm.vhd
UART_RXD/FPGA_RXD/urm.vhd.bak
UART_RXD/FPGA_urflp/db/logic_util_heursitic.dat
UART_RXD/FPGA_urflp/db/prev_cmp_urst.qmsg
UART_RXD/FPGA_urflp/db/urst.(0).cnf.cdb
UART_RXD/FPGA_urflp/db/urst.(0).cnf.hdb
UART_RXD/FPGA_urflp/db/urst.cbx.xml
UART_RXD/FPGA_urflp/db/urst.cmp.rdb
UART_RXD/FPGA_urflp/db/urst.cmp_merge.kpt
UART_RXD/FPGA_urflp/db/urst.db_info
UART_RXD/FPGA_urflp/db/urst.hier_info
UART_RXD/FPGA_urflp/db/urst.hif
UART_RXD/FPGA_urflp/db/urst.lpc.html
UART_RXD/FPGA_urflp/db/urst.lpc.rdb
UART_RXD/FPGA_urflp/db/urst.lpc.txt
UART_RXD/FPGA_urflp/db/urst.map.bpm
UART_RXD/FPGA_urflp/db/urst.map.cdb
UART_RXD/FPGA_urflp/db/urst.map.hdb
UART_RXD/FPGA_urflp/db/urst.map.kpt
UART_RXD/FPGA_urflp/db/urst.map.logdb
UART_RXD/FPGA_urflp/db/urst.map.qmsg
UART_RXD/FPGA_urflp/db/urst.map_bb.cdb
UART_RXD/FPGA_urflp/db/urst.map_bb.hdb
UART_RXD/FPGA_urflp/db/urst.map_bb.logdb
UART_RXD/FPGA_urflp/db/urst.pre_map.cdb
UART_RXD/FPGA_urflp/db/urst.pre_map.hdb
UART_RXD/FPGA_urflp/db/urst.rpp.qmsg
UART_RXD/FPGA_urflp/db/urst.rtlv.hdb
UART_RXD/FPGA_urflp/db/urst.rtlv_sg.cdb
UART_RXD/FPGA_urflp/db/urst.rtlv_sg_swap.cdb
UART_RXD/FPGA_urflp/db/urst.sgate.rvd
UART_RXD/FPGA_urflp/db/urst.sgate_sm.rvd
UART_RXD/FPGA_urflp/db/urst.sgdiff.cdb
UART_RXD/FPGA_urflp/db/urst.sgdiff.hdb
UART_RXD/FPGA_urflp/db/urst.sld_design_entry.sci
UART_RXD/FPGA_urflp/db/urst.sld_design_entry_dsc.sci
UART_RXD/FPGA_urflp/db/urst.smart_action.txt
UART_RXD/FPGA_urflp/db/urst.syn_hier_info
UART_RXD/FPGA_urflp/db/urst.tis_db_list.ddb
UART_RXD/FPGA_urflp/db/urst.tmw_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.db_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.cdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.dpi
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.cdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.hb_info
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.hdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hbdb.sig
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.hdb
UART_RXD/FPGA_urflp/incremental_db/compiled_partitions/urst.root_partition.map.kpt
UART_RXD/FPGA_urflp/incremental_db/README
UART_RXD/FPGA_urflp/urst.done
UART_RXD/FPGA_urflp/urst.flow.rpt
UART_RXD/FPGA_urflp/urst.map.rpt
UART_RXD/FPGA_urflp/urst.map.summary
UART_RXD/FPGA_urflp/urst.qpf
UART_RXD/FPGA_urflp/urst.qsf
UART_RXD/FPGA_urflp/urst.vhd
UART_RXD/FPGA_urflp/urst.vhd.bak
UART_RXD/FPGA_urtopm/db/logic_util_heursitic.dat
UART_RXD/FPGA_urtopm/db/prev_cmp_urtpm.qmsg
UART_RXD/FPGA_urtopm/db/urtpm.(0).cnf.cdb
UART_RXD/FPGA_urtopm/db/urtpm.(0).cnf.hdb
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