文件名称:simpleCPU
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- 上传时间:2012-11-16
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文件大小:164.93kb
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一个简单的多周期CPU的实现,verilog语言实现,结构较简单,欢迎分享-A simple multiple CPU,based on language verilog
(系统自动生成,下载前可以参看下载内容)
下载文件列表
simpleCPU/1.cr.mti
simpleCPU/1.mpf
simpleCPU/ALU.v
simpleCPU/ALU.v.bak
simpleCPU/c.cr.mti
simpleCPU/c.mpf
simpleCPU/chaipangzi/@a@l@u/verilog.asm
simpleCPU/chaipangzi/@a@l@u/_primary.dat
simpleCPU/chaipangzi/@a@l@u/_primary.vhd
simpleCPU/chaipangzi/@c@u/verilog.asm
simpleCPU/chaipangzi/@c@u/_primary.dat
simpleCPU/chaipangzi/@c@u/_primary.vhd
simpleCPU/chaipangzi/@g@r/verilog.asm
simpleCPU/chaipangzi/@g@r/_primary.dat
simpleCPU/chaipangzi/@g@r/_primary.vhd
simpleCPU/chaipangzi/@k@d_@c@p@u/verilog.asm
simpleCPU/chaipangzi/@k@d_@c@p@u/_primary.dat
simpleCPU/chaipangzi/@k@d_@c@p@u/_primary.vhd
simpleCPU/chaipangzi/@p@c/verilog.asm
simpleCPU/chaipangzi/@p@c/_primary.dat
simpleCPU/chaipangzi/@p@c/_primary.vhd
simpleCPU/chaipangzi/memory/verilog.asm
simpleCPU/chaipangzi/memory/_primary.dat
simpleCPU/chaipangzi/memory/_primary.vhd
simpleCPU/chaipangzi/mux2/verilog.asm
simpleCPU/chaipangzi/mux2/_primary.dat
simpleCPU/chaipangzi/mux2/_primary.vhd
simpleCPU/chaipangzi/mux4/verilog.asm
simpleCPU/chaipangzi/mux4/_primary.dat
simpleCPU/chaipangzi/mux4/_primary.vhd
simpleCPU/chaipangzi/register/verilog.asm
simpleCPU/chaipangzi/register/_primary.dat
simpleCPU/chaipangzi/register/_primary.vhd
simpleCPU/chaipangzi/register2/verilog.asm
simpleCPU/chaipangzi/register2/_primary.dat
simpleCPU/chaipangzi/register2/_primary.vhd
simpleCPU/chaipangzi/testbench/verilog.asm
simpleCPU/chaipangzi/testbench/_primary.dat
simpleCPU/chaipangzi/testbench/_primary.vhd
simpleCPU/chaipangzi/_info
simpleCPU/chaipangzi.cr.mti
simpleCPU/chaipangzi.mpf
simpleCPU/code.cr.mti
simpleCPU/code.mpf
simpleCPU/cu.v
simpleCPU/cu.v.bak
simpleCPU/GR.v
simpleCPU/GR.v.bak
simpleCPU/KD_cpu.cr.mti
simpleCPU/KD_cpu.mpf
simpleCPU/KD_CPU.v
simpleCPU/KD_CPU.v.bak
simpleCPU/mem.v
simpleCPU/mux-2.v
simpleCPU/mux4.v
simpleCPU/mux8.v
simpleCPU/pc.v
simpleCPU/pc.v.bak
simpleCPU/register.v
simpleCPU/register2.v
simpleCPU/test2.v
simpleCPU/test3.v
simpleCPU/test3.v.bak
simpleCPU/TESTBENCH.v
simpleCPU/TESTBENCH.v.bak
simpleCPU/transcript
simpleCPU/vish_stacktrace.vstf
simpleCPU/vsim.wlf
simpleCPU/work/@a@l@u/verilog.asm
simpleCPU/work/@a@l@u/_primary.dat
simpleCPU/work/@a@l@u/_primary.vhd
simpleCPU/work/@c@u/verilog.asm
simpleCPU/work/@c@u/_primary.dat
simpleCPU/work/@c@u/_primary.vhd
simpleCPU/work/@g@r/verilog.asm
simpleCPU/work/@g@r/_primary.dat
simpleCPU/work/@g@r/_primary.vhd
simpleCPU/work/@k@d_@c@p@u/verilog.asm
simpleCPU/work/@k@d_@c@p@u/_primary.dat
simpleCPU/work/@k@d_@c@p@u/_primary.vhd
simpleCPU/work/@p@c/verilog.asm
simpleCPU/work/@p@c/_primary.dat
simpleCPU/work/@p@c/_primary.vhd
simpleCPU/work/memory/verilog.asm
simpleCPU/work/memory/_primary.dat
simpleCPU/work/memory/_primary.vhd
simpleCPU/work/mux2/verilog.asm
simpleCPU/work/mux2/_primary.dat
simpleCPU/work/mux2/_primary.vhd
simpleCPU/work/mux4/verilog.asm
simpleCPU/work/mux4/_primary.dat
simpleCPU/work/mux4/_primary.vhd
simpleCPU/work/mux8/verilog.asm
simpleCPU/work/mux8/_primary.dat
simpleCPU/work/mux8/_primary.vhd
simpleCPU/work/register/verilog.asm
simpleCPU/work/register/_primary.dat
simpleCPU/work/register/_primary.vhd
simpleCPU/work/register2/verilog.asm
simpleCPU/work/register2/_primary.dat
simpleCPU/work/register2/_primary.vhd
simpleCPU/work/test2/verilog.asm
simpleCPU/work/test2/_primary.dat
simpleCPU/work/test2/_primary.vhd
simpleCPU/work/test3/verilog.asm
simpleCPU/work/test3/_primary.dat
simpleCPU/work/test3/_primary.vhd
simpleCPU/work/testbench/verilog.asm
simpleCPU/work/testbench/_primary.dat
simpleCPU/work/testbench/_primary.vhd
simpleCPU/work/_info
simpleCPU/chaipangzi/@a@l@u
simpleCPU/chaipangzi/@c@u
simpleCPU/chaipangzi/@g@r
simpleCPU/chaipangzi/@k@d_@c@p@u
simpleCPU/chaipangzi/@p@c
simpleCPU/chaipangzi/memory
simpleCPU/chaipangzi/mux2
simpleCPU/chaipangzi/mux4
simpleCPU/chaipangzi/register
simpleCPU/chaipangzi/register2
simpleCPU/chaipangzi/testbench
simpleCPU/work/@a@l@u
simpleCPU/work/@c@u
simpleCPU/work/@g@r
simpleCPU/work/@k@d_@c@p@u
simpleCPU/work/@p@c
simpleCPU/work/memory
simpleCPU/work/mux2
simpleCPU/work/mux4
simpleCPU/work/mux8
simpleCPU/work/register
simpleCPU/work/register2
simpleCPU/work/test2
simpleCPU/work/test3
simpleCPU/work/testbench
simpleCPU/chaipangzi
simpleCPU/work
simpleCPU
simpleCPU/1.mpf
simpleCPU/ALU.v
simpleCPU/ALU.v.bak
simpleCPU/c.cr.mti
simpleCPU/c.mpf
simpleCPU/chaipangzi/@a@l@u/verilog.asm
simpleCPU/chaipangzi/@a@l@u/_primary.dat
simpleCPU/chaipangzi/@a@l@u/_primary.vhd
simpleCPU/chaipangzi/@c@u/verilog.asm
simpleCPU/chaipangzi/@c@u/_primary.dat
simpleCPU/chaipangzi/@c@u/_primary.vhd
simpleCPU/chaipangzi/@g@r/verilog.asm
simpleCPU/chaipangzi/@g@r/_primary.dat
simpleCPU/chaipangzi/@g@r/_primary.vhd
simpleCPU/chaipangzi/@k@d_@c@p@u/verilog.asm
simpleCPU/chaipangzi/@k@d_@c@p@u/_primary.dat
simpleCPU/chaipangzi/@k@d_@c@p@u/_primary.vhd
simpleCPU/chaipangzi/@p@c/verilog.asm
simpleCPU/chaipangzi/@p@c/_primary.dat
simpleCPU/chaipangzi/@p@c/_primary.vhd
simpleCPU/chaipangzi/memory/verilog.asm
simpleCPU/chaipangzi/memory/_primary.dat
simpleCPU/chaipangzi/memory/_primary.vhd
simpleCPU/chaipangzi/mux2/verilog.asm
simpleCPU/chaipangzi/mux2/_primary.dat
simpleCPU/chaipangzi/mux2/_primary.vhd
simpleCPU/chaipangzi/mux4/verilog.asm
simpleCPU/chaipangzi/mux4/_primary.dat
simpleCPU/chaipangzi/mux4/_primary.vhd
simpleCPU/chaipangzi/register/verilog.asm
simpleCPU/chaipangzi/register/_primary.dat
simpleCPU/chaipangzi/register/_primary.vhd
simpleCPU/chaipangzi/register2/verilog.asm
simpleCPU/chaipangzi/register2/_primary.dat
simpleCPU/chaipangzi/register2/_primary.vhd
simpleCPU/chaipangzi/testbench/verilog.asm
simpleCPU/chaipangzi/testbench/_primary.dat
simpleCPU/chaipangzi/testbench/_primary.vhd
simpleCPU/chaipangzi/_info
simpleCPU/chaipangzi.cr.mti
simpleCPU/chaipangzi.mpf
simpleCPU/code.cr.mti
simpleCPU/code.mpf
simpleCPU/cu.v
simpleCPU/cu.v.bak
simpleCPU/GR.v
simpleCPU/GR.v.bak
simpleCPU/KD_cpu.cr.mti
simpleCPU/KD_cpu.mpf
simpleCPU/KD_CPU.v
simpleCPU/KD_CPU.v.bak
simpleCPU/mem.v
simpleCPU/mux-2.v
simpleCPU/mux4.v
simpleCPU/mux8.v
simpleCPU/pc.v
simpleCPU/pc.v.bak
simpleCPU/register.v
simpleCPU/register2.v
simpleCPU/test2.v
simpleCPU/test3.v
simpleCPU/test3.v.bak
simpleCPU/TESTBENCH.v
simpleCPU/TESTBENCH.v.bak
simpleCPU/transcript
simpleCPU/vish_stacktrace.vstf
simpleCPU/vsim.wlf
simpleCPU/work/@a@l@u/verilog.asm
simpleCPU/work/@a@l@u/_primary.dat
simpleCPU/work/@a@l@u/_primary.vhd
simpleCPU/work/@c@u/verilog.asm
simpleCPU/work/@c@u/_primary.dat
simpleCPU/work/@c@u/_primary.vhd
simpleCPU/work/@g@r/verilog.asm
simpleCPU/work/@g@r/_primary.dat
simpleCPU/work/@g@r/_primary.vhd
simpleCPU/work/@k@d_@c@p@u/verilog.asm
simpleCPU/work/@k@d_@c@p@u/_primary.dat
simpleCPU/work/@k@d_@c@p@u/_primary.vhd
simpleCPU/work/@p@c/verilog.asm
simpleCPU/work/@p@c/_primary.dat
simpleCPU/work/@p@c/_primary.vhd
simpleCPU/work/memory/verilog.asm
simpleCPU/work/memory/_primary.dat
simpleCPU/work/memory/_primary.vhd
simpleCPU/work/mux2/verilog.asm
simpleCPU/work/mux2/_primary.dat
simpleCPU/work/mux2/_primary.vhd
simpleCPU/work/mux4/verilog.asm
simpleCPU/work/mux4/_primary.dat
simpleCPU/work/mux4/_primary.vhd
simpleCPU/work/mux8/verilog.asm
simpleCPU/work/mux8/_primary.dat
simpleCPU/work/mux8/_primary.vhd
simpleCPU/work/register/verilog.asm
simpleCPU/work/register/_primary.dat
simpleCPU/work/register/_primary.vhd
simpleCPU/work/register2/verilog.asm
simpleCPU/work/register2/_primary.dat
simpleCPU/work/register2/_primary.vhd
simpleCPU/work/test2/verilog.asm
simpleCPU/work/test2/_primary.dat
simpleCPU/work/test2/_primary.vhd
simpleCPU/work/test3/verilog.asm
simpleCPU/work/test3/_primary.dat
simpleCPU/work/test3/_primary.vhd
simpleCPU/work/testbench/verilog.asm
simpleCPU/work/testbench/_primary.dat
simpleCPU/work/testbench/_primary.vhd
simpleCPU/work/_info
simpleCPU/chaipangzi/@a@l@u
simpleCPU/chaipangzi/@c@u
simpleCPU/chaipangzi/@g@r
simpleCPU/chaipangzi/@k@d_@c@p@u
simpleCPU/chaipangzi/@p@c
simpleCPU/chaipangzi/memory
simpleCPU/chaipangzi/mux2
simpleCPU/chaipangzi/mux4
simpleCPU/chaipangzi/register
simpleCPU/chaipangzi/register2
simpleCPU/chaipangzi/testbench
simpleCPU/work/@a@l@u
simpleCPU/work/@c@u
simpleCPU/work/@g@r
simpleCPU/work/@k@d_@c@p@u
simpleCPU/work/@p@c
simpleCPU/work/memory
simpleCPU/work/mux2
simpleCPU/work/mux4
simpleCPU/work/mux8
simpleCPU/work/register
simpleCPU/work/register2
simpleCPU/work/test2
simpleCPU/work/test3
simpleCPU/work/testbench
simpleCPU/chaipangzi
simpleCPU/work
simpleCPU
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