文件名称:watch_sc4
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- 上传时间:2012-11-16
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文件大小:243.58kb
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用VHDL语言设计一个简易秒表,开发工具是xilinx,有重置功能-design a second-counting watch with Language VHDL and platform xilinx
(系统自动生成,下载前可以参看下载内容)
下载文件列表
watch_sc4/watch_sc4.ise
watch_sc4/test_watch.xwv
watch_sc4/test_watch.vhw
watch_sc4/test_watch.ant
watch_sc4/test_watch.tbw
watch_sc4/test_watch.jhd
watch_sc4/test_watch.tfw
watch_sc4/_xmsgs/netgen.xmsgs
watch_sc4/_xmsgs/xst.xmsgs
watch_sc4/_xmsgs/fuse.xmsgs
watch_sc4/_xmsgs/vhpcomp.xmsgs
watch_sc4/watch_sc4.ise_ISE_Backup
watch_sc4/test_watch_gen.prj
watch_sc4/xilinxsim.ini
watch_sc4/test_watch_beh.prj
watch_sc4/test_watch_beh__vlog.prj
watch_sc4/test_watch_beh__vhdl.prj
watch_sc4/watch_sc.vhd
watch_sc4/watch_sc_summary.html
watch_sc4/watch_sc2_summary.html
watch_sc4/watch_sc2.prj
watch_sc4/xst/work/sub00/vhpl00.vho
watch_sc4/xst/work/sub00/vhpl01.vho
watch_sc4/xst/work/hdllib.ref
watch_sc4/xst/work/hdpdeps.ref
watch_sc4/xst/dump.xst/watch_sc2.prj/ntrc.scr
watch_sc4/watch_sc2.xst
watch_sc4/watch_sc2.cmd_log
watch_sc4/watch_sc2.syr
watch_sc4/watch_sc2.lso
watch_sc4/watch_sc4.ntrc_log
watch_sc4/.lso
watch_sc4/netgen/synthesis/watch_sc2_synthesis.nlf
watch_sc4/netgen/synthesis/watch_sc2_synthesis.v
watch_sc4/test_watch_bencher.prj
watch_sc4/pepExtractor.prj
watch_sc4/test_watch.xwv_bak
watch_sc4/watch_sc2.stx
watch_sc4/watch_sc2_vhdl.prj
watch_sc4/watch_sc2.ngr
watch_sc4/watch_sc2.ngc
watch_sc4/isim/work/vlg0E/test__watch.bin
watch_sc4/isim/work/hdllib.ref
watch_sc4/isim/work/test__watch/test__watch.h
watch_sc4/isim/work/test__watch/mingw/test__watch.obj
watch_sc4/isim/work/test__watch/xsimtest__watch.cpp
watch_sc4/isim/work/sub00/vhpl00.vho
watch_sc4/isim/work/sub00/vhpl01.vho
watch_sc4/isim/work/watch_sc2/behavioral.h
watch_sc4/isim/work/watch_sc2/mingw/behavioral.obj
watch_sc4/isim/work/vlg2D/glbl.bin
watch_sc4/isim/work/glbl/glbl.h
watch_sc4/isim/work/glbl/mingw/glbl.obj
watch_sc4/isim/work/hdpdeps.ref
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx/opt
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx/notopt
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx
watch_sc4/isim/work/test__watch/mingw
watch_sc4/isim/work/watch_sc2/mingw
watch_sc4/isim/work/glbl/mingw
watch_sc4/xst/work/sub00
watch_sc4/xst/dump.xst/watch_sc2.prj
watch_sc4/isim/work/vlg0E
watch_sc4/isim/work/test__watch
watch_sc4/isim/work/sub00
watch_sc4/isim/work/watch_sc2
watch_sc4/isim/work/vlg2D
watch_sc4/isim/work/glbl
watch_sc4/xst/projnav.tmp
watch_sc4/xst/work
watch_sc4/xst/dump.xst
watch_sc4/netgen/synthesis
watch_sc4/isim/work
watch_sc4/_xmsgs
watch_sc4/xst
watch_sc4/netgen
watch_sc4/isim
watch_sc4
watch_sc4/test_watch.xwv
watch_sc4/test_watch.vhw
watch_sc4/test_watch.ant
watch_sc4/test_watch.tbw
watch_sc4/test_watch.jhd
watch_sc4/test_watch.tfw
watch_sc4/_xmsgs/netgen.xmsgs
watch_sc4/_xmsgs/xst.xmsgs
watch_sc4/_xmsgs/fuse.xmsgs
watch_sc4/_xmsgs/vhpcomp.xmsgs
watch_sc4/watch_sc4.ise_ISE_Backup
watch_sc4/test_watch_gen.prj
watch_sc4/xilinxsim.ini
watch_sc4/test_watch_beh.prj
watch_sc4/test_watch_beh__vlog.prj
watch_sc4/test_watch_beh__vhdl.prj
watch_sc4/watch_sc.vhd
watch_sc4/watch_sc_summary.html
watch_sc4/watch_sc2_summary.html
watch_sc4/watch_sc2.prj
watch_sc4/xst/work/sub00/vhpl00.vho
watch_sc4/xst/work/sub00/vhpl01.vho
watch_sc4/xst/work/hdllib.ref
watch_sc4/xst/work/hdpdeps.ref
watch_sc4/xst/dump.xst/watch_sc2.prj/ntrc.scr
watch_sc4/watch_sc2.xst
watch_sc4/watch_sc2.cmd_log
watch_sc4/watch_sc2.syr
watch_sc4/watch_sc2.lso
watch_sc4/watch_sc4.ntrc_log
watch_sc4/.lso
watch_sc4/netgen/synthesis/watch_sc2_synthesis.nlf
watch_sc4/netgen/synthesis/watch_sc2_synthesis.v
watch_sc4/test_watch_bencher.prj
watch_sc4/pepExtractor.prj
watch_sc4/test_watch.xwv_bak
watch_sc4/watch_sc2.stx
watch_sc4/watch_sc2_vhdl.prj
watch_sc4/watch_sc2.ngr
watch_sc4/watch_sc2.ngc
watch_sc4/isim/work/vlg0E/test__watch.bin
watch_sc4/isim/work/hdllib.ref
watch_sc4/isim/work/test__watch/test__watch.h
watch_sc4/isim/work/test__watch/mingw/test__watch.obj
watch_sc4/isim/work/test__watch/xsimtest__watch.cpp
watch_sc4/isim/work/sub00/vhpl00.vho
watch_sc4/isim/work/sub00/vhpl01.vho
watch_sc4/isim/work/watch_sc2/behavioral.h
watch_sc4/isim/work/watch_sc2/mingw/behavioral.obj
watch_sc4/isim/work/vlg2D/glbl.bin
watch_sc4/isim/work/glbl/glbl.h
watch_sc4/isim/work/glbl/mingw/glbl.obj
watch_sc4/isim/work/hdpdeps.ref
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx/opt
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx/notopt
watch_sc4/xst/dump.xst/watch_sc2.prj/ngx
watch_sc4/isim/work/test__watch/mingw
watch_sc4/isim/work/watch_sc2/mingw
watch_sc4/isim/work/glbl/mingw
watch_sc4/xst/work/sub00
watch_sc4/xst/dump.xst/watch_sc2.prj
watch_sc4/isim/work/vlg0E
watch_sc4/isim/work/test__watch
watch_sc4/isim/work/sub00
watch_sc4/isim/work/watch_sc2
watch_sc4/isim/work/vlg2D
watch_sc4/isim/work/glbl
watch_sc4/xst/projnav.tmp
watch_sc4/xst/work
watch_sc4/xst/dump.xst
watch_sc4/netgen/synthesis
watch_sc4/isim/work
watch_sc4/_xmsgs
watch_sc4/xst
watch_sc4/netgen
watch_sc4/isim
watch_sc4
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