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文件名称:dds_synthesizer

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  • 上传时间:
    2012-11-16
  • 文件大小:
    575.42kb
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介绍说明--下载内容来自于网络,使用问题请自行百度

Matlab code for dds output can be taken for sine wave generation using matlab
(系统自动生成,下载前可以参看下载内容)

下载文件列表

dds_synthesizer/
dds_synthesizer/copying
dds_synthesizer/matlab/
dds_synthesizer/matlab/generate_vhdl_lut.asv
dds_synthesizer/matlab/sine_lut_gen.asv
dds_synthesizer/matlab/generate_vhdl_lut.m
dds_synthesizer/matlab/sine_lut_gen.m
dds_synthesizer/matlab/sine_lut.m
dds_synthesizer/doc/
dds_synthesizer/doc/images/
dds_synthesizer/doc/images/build.sh
dds_synthesizer/doc/images/dds_implementation.eps
dds_synthesizer/doc/images/dds_implementation.svg
dds_synthesizer/doc/images/dds_implementation.pdf
dds_synthesizer/doc/dds_synthesizer.tex
dds_synthesizer/doc/dds_synthesizer.aux
dds_synthesizer/doc/dds_synthesizer.out
dds_synthesizer/doc/dds_synthesizer.pdf
dds_synthesizer/sim/
dds_synthesizer/sim/work/
dds_synthesizer/sim/work/dds_synthesizer_iq_tb/
dds_synthesizer/sim/work/dds_synthesizer_iq_tb/dds_synthesizer_iq_tb_arch.dat
dds_synthesizer/sim/work/dds_synthesizer_iq_tb/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer_iq_tb/dds_synthesizer_iq_tb_arch.psm
dds_synthesizer/sim/work/dds_synthesizer/
dds_synthesizer/sim/work/dds_synthesizer/dds_synthesizer_arch.dat
dds_synthesizer/sim/work/dds_synthesizer/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer/dds_synthesizer_arch.psm
dds_synthesizer/sim/work/dds_synthesizer_pkg/
dds_synthesizer/sim/work/dds_synthesizer_pkg/body.dat
dds_synthesizer/sim/work/dds_synthesizer_pkg/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer_pkg/_vhdl.psm
dds_synthesizer/sim/work/dds_synthesizer_pkg/body.psm
dds_synthesizer/sim/work/sine_lut_pkg/
dds_synthesizer/sim/work/sine_lut_pkg/body.dat
dds_synthesizer/sim/work/sine_lut_pkg/_primary.dat
dds_synthesizer/sim/work/sine_lut_pkg/_vhdl.psm
dds_synthesizer/sim/work/sine_lut_pkg/body.psm
dds_synthesizer/sim/work/dds_synthesizer_tb/
dds_synthesizer/sim/work/dds_synthesizer_tb/dds_synthesizer_tb_arch.psm
dds_synthesizer/sim/work/dds_synthesizer_tb/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer_tb/dds_synthesizer_tb_arch.dat
dds_synthesizer/sim/work/dds_synthesizer_iq/
dds_synthesizer/sim/work/dds_synthesizer_iq/dds_synthesizer_iq_arch.psm
dds_synthesizer/sim/work/dds_synthesizer_iq/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer_iq/dds_synthesizer_iq_arch.dat
dds_synthesizer/sim/work/dds_synthesizer_iq_pkg/
dds_synthesizer/sim/work/dds_synthesizer_iq_pkg/body.dat
dds_synthesizer/sim/work/dds_synthesizer_iq_pkg/_primary.dat
dds_synthesizer/sim/work/dds_synthesizer_iq_pkg/_vhdl.psm
dds_synthesizer/sim/work/dds_synthesizer_iq_pkg/body.psm
dds_synthesizer/sim/work/_info
dds_synthesizer/sim/WAVEFORMS/
dds_synthesizer/sim/WAVEFORMS/dds_synthesizer.do
dds_synthesizer/sim/WAVEFORMS/dds_synthesizer_iq.do
dds_synthesizer/sim/dds_synthesizer.mpf
dds_synthesizer/sim/vsim.wlf
dds_synthesizer/sim/transcript
dds_synthesizer/sim/dds_synthesizer.cr.mti
dds_synthesizer/vhdl/
dds_synthesizer/vhdl/sine_lut/
dds_synthesizer/vhdl/sine_lut/sine_lut_10_x_8.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_8_x_10.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_12_x_8.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_8_x_12.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_14_x_8.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_8_x_14.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_16_x_8.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_8_x_16.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_10_x_10.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_12_x_10.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_10_x_12.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_14_x_10.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_12_x_12.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_10_x_14.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_16_x_10.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_14_x_12.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_12_x_14.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_10_x_16.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_14_x_14.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_12_x_16.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_16_x_12.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_14_x_16.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_16_x_14.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_16_x_16.vhd
dds_synthesizer/vhdl/sine_lut/sine_lut_8_x_8.vhd
dds_synthesizer/vhdl/dds_synthesizer.vhd
dds_synthesizer/vhdl/dds_synthesizer_tb.vhd

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