文件名称:5.1-1602
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- 上传时间:2012-11-16
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文件大小:621.05kb
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1602字符液晶显示程序,用来完成液晶的显示,基础的那种-1602 character LCD program, to complete the liquid crystal display based on the kind of
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下载文件列表
5.1 1602/VHDL/lcd1602.vhd
5.1 1602/VHDL/lcd1602.vhd.bak
5.1 1602/VHDL/lcd_display.asm.rpt
5.1 1602/VHDL/lcd_display.cdf
5.1 1602/VHDL/lcd_display.done
5.1 1602/VHDL/lcd_display.dpf
5.1 1602/VHDL/lcd_display.fit.rpt
5.1 1602/VHDL/lcd_display.fit.smsg
5.1 1602/VHDL/lcd_display.fit.summary
5.1 1602/VHDL/lcd_display.flow.rpt
5.1 1602/VHDL/lcd_display.map.rpt
5.1 1602/VHDL/lcd_display.map.summary
5.1 1602/VHDL/lcd_display.pin
5.1 1602/VHDL/lcd_display.pof
5.1 1602/VHDL/lcd_display.qpf
5.1 1602/VHDL/lcd_display.qsf
5.1 1602/VHDL/lcd_display.qsf.bak
5.1 1602/VHDL/lcd_display.sof
5.1 1602/VHDL/lcd_display.tan.rpt
5.1 1602/VHDL/lcd_display.tan.summary
5.1 1602/VHDL/lcd_display.vhd.bak
5.1 1602/VHDL/lcd_display_assignment_defaults.qdf
5.1 1602/VHDL/pin/CORE2-5SD-SLOT1.tcl
5.1 1602/VHDL/pin/CORE2-5U-SLOT1.tcl
5.1 1602/VHDL/pin/COREC-240U-SLOT1.tcl
5.1 1602/VHDL/incremental_db/README
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.atm
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.dfp
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.hdbx
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.kpt
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.logdb
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.rcf
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.atm
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.dpi
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.hdbx
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.kpt
5.1 1602/VHDL/db/lcd_display_global_asgn_op.abo
5.1 1602/VHDL/db/prev_cmp_lcd_display.asm.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.fit.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.map.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.tan.qmsg
5.1 1602/VHDL/db/lcd_display.db_info
5.1 1602/VHDL/db/lcd_display.sld_design_entry.sci
5.1 1602/VHDL/db/lcd_display.eco.cdb
5.1 1602/VHDL/lcd_display.qws
5.1 1602/Verilog/div16.v.bak
5.1 1602/Verilog/lcd.v.bak
5.1 1602/Verilog/lcd1602.cdf
5.1 1602/Verilog/lcd1602.done
5.1 1602/Verilog/lcd1602.dpf
5.1 1602/Verilog/lcd1602.fit.smsg
5.1 1602/Verilog/lcd1602.fit.summary
5.1 1602/Verilog/lcd1602.map.summary
5.1 1602/Verilog/lcd1602.pin
5.1 1602/Verilog/lcd1602.pof
5.1 1602/Verilog/lcd1602.qpf
5.1 1602/Verilog/lcd1602.qsf
5.1 1602/Verilog/lcd1602.sof
5.1 1602/Verilog/lcd1602.tan.summary
5.1 1602/Verilog/lcd1602.v
5.1 1602/Verilog/lcd1602.v.bak
5.1 1602/Verilog/lcd1602_assignment_defaults.qdf
5.1 1602/Verilog/lcd1602_description.txt
5.1 1602/Verilog/pin/CORE2-5SD-SLOT1.tcl
5.1 1602/Verilog/pin/CORE2-5U-SLOT1.tcl
5.1 1602/Verilog/pin/COREC-240U-SLOT1.tcl
5.1 1602/Verilog/incremental_db/README
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.atm
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.hdbx
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.kpt
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.logdb
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.rcf
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.atm
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.hdbx
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.kpt
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.dpi
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.dfp
5.1 1602/Verilog/db/lcd1602.db_info
5.1 1602/Verilog/db/lcd1602_global_asgn_op.abo
5.1 1602/Verilog/db/prev_cmp_lcd1602.asm.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.fit.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.map.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.tan.qmsg
5.1 1602/Verilog/db/lcd1602.map.qmsg
5.1 1602/Verilog/db/lcd1602.cbx.xml
5.1 1602/Verilog/db/lcd1602.hif
5.1 1602/Verilog/db/lcd1602.(0).cnf.cdb
5.1 1602/Verilog/db/lcd1602.(0).cnf.hdb
5.1 1602/Verilog/db/lcd1602.hier_info
5.1 1602/Verilog/db/lcd1602.rtlv_sg.cdb
5.1 1602/Verilog/db/lcd1602.rtlv.hdb
5.1 1602/Verilog/db/lcd1602.rtlv_sg_swap.cdb
5.1 1602/Verilog/db/lcd1602.lpc.txt
5.1 1602/Verilog/db/lcd1602.lpc.html
5.1 1602/Verilog/db/lcd1602.lpc.rdb
5.1 1602/Verilog/db/lcd1602.pre_map.hdb
5.1 1602/Verilog/db/lcd1602.pre_map.cdb
5.1 1602/Verilog/db/lcd1602.smp_dump.txt
5.1 1602/Verilog/db/lcd1602.map_bb.logdb
5.1 1602/Verilog/db/lcd1602.sgdiff.cdb
5.1 1602/Verilog/db/lcd1602.sgdiff.hdb
5.1 1602/Verilog/db/lcd1602.sld_design_entry_dsc.sci
5.1 1602/Verilog/db/lcd1602.syn_hier_info
5.1 1602/Verilog/db/lcd1602.map_bb.cdb
5.1 1602/Verilog/db/lcd1602.map_bb.hdb
5.1 1602/Verilog/db/lcd1602.map.ecobp
5.1 1602/Verilog/db/lcd1602.map.kpt
5.1 1602/Verilog/db/lcd1602.cmp_merge.kpt
5.1 1602/Verilog/db/lcd1602.map.cdb
5.1 1602/Verilog/db/lcd1602.map.hdb
5.1 1602/Verilog
5.1 1602/VHDL/lcd1602.vhd.bak
5.1 1602/VHDL/lcd_display.asm.rpt
5.1 1602/VHDL/lcd_display.cdf
5.1 1602/VHDL/lcd_display.done
5.1 1602/VHDL/lcd_display.dpf
5.1 1602/VHDL/lcd_display.fit.rpt
5.1 1602/VHDL/lcd_display.fit.smsg
5.1 1602/VHDL/lcd_display.fit.summary
5.1 1602/VHDL/lcd_display.flow.rpt
5.1 1602/VHDL/lcd_display.map.rpt
5.1 1602/VHDL/lcd_display.map.summary
5.1 1602/VHDL/lcd_display.pin
5.1 1602/VHDL/lcd_display.pof
5.1 1602/VHDL/lcd_display.qpf
5.1 1602/VHDL/lcd_display.qsf
5.1 1602/VHDL/lcd_display.qsf.bak
5.1 1602/VHDL/lcd_display.sof
5.1 1602/VHDL/lcd_display.tan.rpt
5.1 1602/VHDL/lcd_display.tan.summary
5.1 1602/VHDL/lcd_display.vhd.bak
5.1 1602/VHDL/lcd_display_assignment_defaults.qdf
5.1 1602/VHDL/pin/CORE2-5SD-SLOT1.tcl
5.1 1602/VHDL/pin/CORE2-5U-SLOT1.tcl
5.1 1602/VHDL/pin/COREC-240U-SLOT1.tcl
5.1 1602/VHDL/incremental_db/README
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.atm
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.dfp
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.hdbx
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.kpt
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.logdb
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.cmp.rcf
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.atm
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.dpi
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.hdbx
5.1 1602/VHDL/incremental_db/compiled_partitions/lcd_display.root_partition.map.kpt
5.1 1602/VHDL/db/lcd_display_global_asgn_op.abo
5.1 1602/VHDL/db/prev_cmp_lcd_display.asm.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.fit.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.map.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.qmsg
5.1 1602/VHDL/db/prev_cmp_lcd_display.tan.qmsg
5.1 1602/VHDL/db/lcd_display.db_info
5.1 1602/VHDL/db/lcd_display.sld_design_entry.sci
5.1 1602/VHDL/db/lcd_display.eco.cdb
5.1 1602/VHDL/lcd_display.qws
5.1 1602/Verilog/div16.v.bak
5.1 1602/Verilog/lcd.v.bak
5.1 1602/Verilog/lcd1602.cdf
5.1 1602/Verilog/lcd1602.done
5.1 1602/Verilog/lcd1602.dpf
5.1 1602/Verilog/lcd1602.fit.smsg
5.1 1602/Verilog/lcd1602.fit.summary
5.1 1602/Verilog/lcd1602.map.summary
5.1 1602/Verilog/lcd1602.pin
5.1 1602/Verilog/lcd1602.pof
5.1 1602/Verilog/lcd1602.qpf
5.1 1602/Verilog/lcd1602.qsf
5.1 1602/Verilog/lcd1602.sof
5.1 1602/Verilog/lcd1602.tan.summary
5.1 1602/Verilog/lcd1602.v
5.1 1602/Verilog/lcd1602.v.bak
5.1 1602/Verilog/lcd1602_assignment_defaults.qdf
5.1 1602/Verilog/lcd1602_description.txt
5.1 1602/Verilog/pin/CORE2-5SD-SLOT1.tcl
5.1 1602/Verilog/pin/CORE2-5U-SLOT1.tcl
5.1 1602/Verilog/pin/COREC-240U-SLOT1.tcl
5.1 1602/Verilog/incremental_db/README
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.atm
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.hdbx
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.kpt
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.logdb
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.rcf
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.atm
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.hdbx
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.kpt
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.map.dpi
5.1 1602/Verilog/incremental_db/compiled_partitions/lcd1602.root_partition.cmp.dfp
5.1 1602/Verilog/db/lcd1602.db_info
5.1 1602/Verilog/db/lcd1602_global_asgn_op.abo
5.1 1602/Verilog/db/prev_cmp_lcd1602.asm.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.fit.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.map.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.qmsg
5.1 1602/Verilog/db/prev_cmp_lcd1602.tan.qmsg
5.1 1602/Verilog/db/lcd1602.map.qmsg
5.1 1602/Verilog/db/lcd1602.cbx.xml
5.1 1602/Verilog/db/lcd1602.hif
5.1 1602/Verilog/db/lcd1602.(0).cnf.cdb
5.1 1602/Verilog/db/lcd1602.(0).cnf.hdb
5.1 1602/Verilog/db/lcd1602.hier_info
5.1 1602/Verilog/db/lcd1602.rtlv_sg.cdb
5.1 1602/Verilog/db/lcd1602.rtlv.hdb
5.1 1602/Verilog/db/lcd1602.rtlv_sg_swap.cdb
5.1 1602/Verilog/db/lcd1602.lpc.txt
5.1 1602/Verilog/db/lcd1602.lpc.html
5.1 1602/Verilog/db/lcd1602.lpc.rdb
5.1 1602/Verilog/db/lcd1602.pre_map.hdb
5.1 1602/Verilog/db/lcd1602.pre_map.cdb
5.1 1602/Verilog/db/lcd1602.smp_dump.txt
5.1 1602/Verilog/db/lcd1602.map_bb.logdb
5.1 1602/Verilog/db/lcd1602.sgdiff.cdb
5.1 1602/Verilog/db/lcd1602.sgdiff.hdb
5.1 1602/Verilog/db/lcd1602.sld_design_entry_dsc.sci
5.1 1602/Verilog/db/lcd1602.syn_hier_info
5.1 1602/Verilog/db/lcd1602.map_bb.cdb
5.1 1602/Verilog/db/lcd1602.map_bb.hdb
5.1 1602/Verilog/db/lcd1602.map.ecobp
5.1 1602/Verilog/db/lcd1602.map.kpt
5.1 1602/Verilog/db/lcd1602.cmp_merge.kpt
5.1 1602/Verilog/db/lcd1602.map.cdb
5.1 1602/Verilog/db/lcd1602.map.hdb
5.1 1602/Verilog
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