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文件名称:video_stream_scaler

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  • 上传时间:
    2012-11-16
  • 文件大小:
    5.38mb
  • 已下载:
    3次
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  • 下载说明:
    别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容来自于网络,使用问题请自行百度

Verilog HDL实现双线性插值视频实时缩放,源码及说明文档-Verilog HDL bilinear interpolation real-time zoom, video source and documentation
(系统自动生成,下载前可以参看下载内容)

下载文件列表

video_stream_scaler/trunk/doc/src/Block Diagram.vsd
video_stream_scaler/trunk/doc/src/Video Stream Scaler Specifications.doc
video_stream_scaler/trunk/doc/Video Stream Scaler Specifications.pdf
video_stream_scaler/trunk/rtl/verilog/scaler.v
video_stream_scaler/trunk/sim/rtl_sim/scaler.cr.mti
video_stream_scaler/trunk/sim/rtl_sim/scaler.mpf
video_stream_scaler/trunk/sim/rtl_sim/scaler.v
video_stream_scaler/trunk/sim/rtl_sim/scaler_tb.v
video_stream_scaler/trunk/sim/rtl_sim/src/input.tif
video_stream_scaler/trunk/sim/rtl_sim/src/input1280x1024boxdiag.bmp
video_stream_scaler/trunk/sim/rtl_sim/src/input1280x1024boxdiagRGB.raw
video_stream_scaler/trunk/sim/rtl_sim/src/input1280x1024RGB.raw
video_stream_scaler/trunk/sim/rtl_sim/src/input640x512boxdiag.bmp
video_stream_scaler/trunk/sim/rtl_sim/src/input640x512boxdiagRGB.raw
video_stream_scaler/trunk/sim/rtl_sim/src/input640x512RGB.raw
video_stream_scaler/trunk/sim/rtl_sim/src/input640x512_21extraRGB.raw
video_stream_scaler/trunk/sim/rtl_sim/vsim.wlf
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port/verilog.asm
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port/verilog.rw
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port/_primary.dat
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port/_primary.dbs
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port/_primary.vhd
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo/verilog.asm
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo/verilog.rw
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo/_primary.dat
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo/_primary.dbs
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo/_primary.vhd
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test/verilog.asm
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test/verilog.rw
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test/_primary.dat
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test/_primary.dbs
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test/_primary.vhd
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench/verilog.asm
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench/verilog.rw
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench/_primary.dat
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench/_primary.dbs
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench/_primary.vhd
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler/verilog.asm
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler/verilog.rw
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler/_primary.dat
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler/_primary.dbs
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler/_primary.vhd
video_stream_scaler/trunk/sim/rtl_sim/work/_info
video_stream_scaler/trunk/sim/rtl_sim/work/_temp/vlog3i6qcw
video_stream_scaler/trunk/sim/rtl_sim/work/_temp/vlog9xyg7b
video_stream_scaler/trunk/sim/rtl_sim/work/_temp/vlogg3009s
video_stream_scaler/trunk/sim/rtl_sim/work/_temp/vloggjv0st
video_stream_scaler/trunk/sim/rtl_sim/work/_vmake
video_stream_scaler/trunk/sim/rtl_sim/work/ram@dual@port
video_stream_scaler/trunk/sim/rtl_sim/work/ram@fifo
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@test
video_stream_scaler/trunk/sim/rtl_sim/work/scaler@testbench
video_stream_scaler/trunk/sim/rtl_sim/work/stream@scaler
video_stream_scaler/trunk/sim/rtl_sim/work/_temp
video_stream_scaler/trunk/sim/rtl_sim/out
video_stream_scaler/trunk/sim/rtl_sim/src
video_stream_scaler/trunk/sim/rtl_sim/work
video_stream_scaler/trunk/doc/src
video_stream_scaler/trunk/rtl/verilog
video_stream_scaler/trunk/sim/rtl_sim
video_stream_scaler/trunk/doc
video_stream_scaler/trunk/rtl
video_stream_scaler/trunk/sim
video_stream_scaler/trunk
video_stream_scaler

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