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文件名称:Day2

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2012-11-16
  • 文件大小：
    47.97mb
  • 已下载：
    0次
  • 提 供 者：
    ke***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

一些赢家逻辑电路和编程的培训资料 大家一块学习-training for the vhdl
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Day2/pdiusb.rar
Day2/VGA.rar
Day2/vgasource/image/1.bmp
Day2/vgasource/image/3.bmp
Day2/vgasource/image/3.coe
Day2/vgasource/image/3.dat
Day2/vgasource/image/4.bmp
Day2/vgasource/image/4.coe
Day2/vgasource/image/4.dat
Day2/vgasource/image/5.coe
Day2/vgasource/image/CoeGenerator.exe
Day2/vgasource/svga_timing_generation.vhd
Day2/vgasource/top.ucf
Day2/vgasource/top.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/a.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/a_isim_beh.wdb
Day2/vgasource/VGAORIGIN_boybig/VGA/b.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/BmpROM.mif
Day2/vgasource/VGAORIGIN_boybig/VGA/b_beh.prj
Day2/vgasource/VGAORIGIN_boybig/VGA/b_isim_beh.exe
Day2/vgasource/VGAORIGIN_boybig/VGA/b_isim_beh.wdb
Day2/vgasource/VGAORIGIN_boybig/VGA/coregen.cgc
Day2/vgasource/VGAORIGIN_boybig/VGA/coregen.cgp
Day2/vgasource/VGAORIGIN_boybig/VGA/fuse.log
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/.lso
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/blk_mem_gen_ds512.pdf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.asy
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.cgc
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.cgp
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.gise
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.mif
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.ncf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.ngc
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.v
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.veo
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.vho
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.xco
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.xco.bak
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM.xise
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM_flist.txt
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM_readme.txt
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/BmpROM_xmdf.tcl
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/clk25Mhz.ucf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/clk_wiz_readme.txt
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/doc/clk_wiz_ds709.pdf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/doc/clk_wiz_gsg521.pdf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/example_design/clk25Mhz_exdes.v
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/example_design/clk25Mhz_exdes.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/implement/implement.bat
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/implement/implement.sh
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/implement/xst.prj
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/implement/xst.scr
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/clk25Mhz_tb.v
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/clk25Mhz_tb.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/simcmds.tcl
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/simulate_isim.sh
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/simulate_mti.do
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/simulate_ncsim.sh
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/simulate_vcs.sh
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/ucli_commands.key
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/vcs_session.tcl
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/wave.do
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz/simulation/functional/wave.sv
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.asy
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.cgc
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.cgp
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.ejp
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.gise
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.ncf
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.v
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.veo
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.vhd
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.vho
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.xco
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz.xise
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz_flist.txt
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/clk25Mhz_xmdf.tcl
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/coregen.cgc
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/coregen.cgp
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/coregen.log
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/coregen.rsp
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/tmp/_cg/BmpROM.mif
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/_xmsgs/ngcbuild.xmsgs
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/_xmsgs/pn_parser.xmsgs
Day2/vgasource/VGAORIGIN_boybig/VGA/ipcore_dir/_xmsgs/xst.xmsgs
Day2/vgasour

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