资源列表
phase_test
- 基于verilog的鉴相器设计，鉴相器是锁相环的一部分，功能是检测两个时钟是否同步-The phase detector based on verilog design, PLL phase detector is part of function is to test whether the two clock synchronization
msp430g2xx3_timera_pwm
- msp430g2553产生pmw波 75 的方波-msp430g2553 pmw 75 fangbo
yinyu
- asm音乐源程序 包含的音乐是二零零二年的第一场雪-asm music source music is included in the 2002 first snow
noname2
- this project for avr and detecte the object by IR
smith110
- 史密斯圆图vb代码 阻抗圆图的代码 可直接生成软件-Smith Chart impedance Smith chart vb code code generation software can be directly
Untitled_fm
- fm信号的生成，图形生成，滤波器生成，信号识别-fm signal generation, graphics generator, the filter generation, signal recognition
74LS165IO
- 串口驱动74LS165 串口驱动74LS165 -Serial driver 74LS165 74LS165 serial port driver serial driver 74LS165 74LS165 serial driver
huatu
- 怎么画环形图并给线条和想要上色的区域上色-How to draw lines and circular chart and color of the area you want to color
gauss_elimination
- this a gauss_elimination matlab code for calculate -this is a gauss_elimination matlab code for calculate
Untitled2-(1)
- This code to demonstrate the performance Rayleigh fading channel With Maximum Ratio Combining (MRC)-This code to demonstrate the performance Rayleigh fading channel With Maximum Ratio Combining (MRC)
example_on_class
- source code html web in php design
FIR-filter
- type of FIR filters and coefficients calculations