文件名称:EDA_VHDL_1C3
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- 上传时间:2012-11-16
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文件大小:62.91mb
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GW48EDA_PKx实验系统箱上的例程、供初学者参考学习-Routine on the test chamber reference for beginners learning
(系统自动生成,下载前可以参看下载内容)
下载文件列表
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/cmp_state.ini
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/DATA1.MIF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/MUSIC.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/NOTETABS.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.asm.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.CDF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.done
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.flow.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.PIN
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QPF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QSF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QWS
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.SOF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.tan.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SPEAKERA.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/TONETABA.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BALL.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BALLCTRL.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BOARD.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/cmp_state.ini
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/COU10.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/COU4.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.db_info
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.eco.cdb
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.sld_design_entry.sci
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/MWAY.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/README/GW48使用readme.txt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/SOUND.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.asm.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.CDF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.done
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.flow.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.PIN
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QPF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QSF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QWS
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.SOF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.tan.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.tan.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS_assignment_defaults.qdf
EDA_VHDL_1C3/Chapter10/实验10_1.pdf
EDA_VHDL_1C3/Chapter10/实验10_2.pdf
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/cmp_state.ini
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.db_info
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.eco.cdb
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.sld_design_entry.sci
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.asm.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.CDF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.done
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.eqn
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.flow.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.eqn
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.PIN
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QPF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QSF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QWS
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.SOF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.tan.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a_assignment_defaults.qdf
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cmp_state.ini
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.asm.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.CDF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.done
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.fit.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.flow.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.map.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.map.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.PIN
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QPF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QSF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QWS
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.SOF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.tan.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.VWF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10B.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10_
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/DATA1.MIF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/MUSIC.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/NOTETABS.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.asm.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.CDF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.done
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.fit.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.flow.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.map.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.PIN
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QPF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QSF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.QWS
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.SOF
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.tan.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SONGER.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/SPEAKERA.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_1_SONGER/TONETABA.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BALL.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BALLCTRL.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/BOARD.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/cmp_state.ini
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/COU10.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/COU4.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.db_info
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.eco.cdb
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/db/TENNIS.sld_design_entry.sci
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/MWAY.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/README/GW48使用readme.txt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/SOUND.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.asm.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.CDF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.done
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.fit.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.flow.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.eqn
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.map.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.PIN
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QPF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QSF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.QWS
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.SOF
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.tan.rpt
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.tan.summary
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS.VHD
EDA_VHDL_1C3/Chapter10/EP1C3_10_2_TENNIS/TENNIS_assignment_defaults.qdf
EDA_VHDL_1C3/Chapter10/实验10_1.pdf
EDA_VHDL_1C3/Chapter10/实验10_2.pdf
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/cmp_state.ini
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.db_info
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.eco.cdb
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/db/mux21a.sld_design_entry.sci
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.asm.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.CDF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.done
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.eqn
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.fit.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.flow.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.eqn
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.map.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.PIN
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QPF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QSF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.QWS
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.SOF
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a.tan.summary
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/MUX21A.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_41_mux21A/mux21a_assignment_defaults.qdf
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cmp_state.ini
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.asm.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.CDF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.done
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.fit.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.flow.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.map.rpt
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.map.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.PIN
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QPF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QSF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.QWS
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.SOF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10.tan.summary
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10.VWF
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/CNT10B.VHD
EDA_VHDL_1C3/Chapter4/EP1C3_43_cnt10/cnt10_
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