采用VHDL设计ADC0809数据采集及显示体统， 顶层模块主要是将各个功能模块组合在一起，完成整体的功能。各个子模块作为元件，在顶层模块中对各个子模块例化，传递中间信号。-To VHDL design ADC0809 data acquisition and display the decency, top-level module is the various functional modules together to complete the overall functionality. Various sub-modules as components of the various sub-module in the top module cases, pass the intermediate signal.