文件名称:vga_de_v_2
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:790.56kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
实现了机遇verilog的对LCD屏幕工作在DE模式的刷屏方法-Opportunities verilog on the LCD screen work in DE mode refresh
(系统自动生成,下载前可以参看下载内容)
下载文件列表
vga_de_v_2/
vga_de_v_2/vga_sync/
vga_de_v_2/vga_sync/clk_out.v
vga_de_v_2/vga_sync/color_control.v
vga_de_v_2/vga_sync/fuse.log
vga_de_v_2/vga_sync/fuse.xmsgs
vga_de_v_2/vga_sync/fuseRelaunch.cmd
vga_de_v_2/vga_sync/ipcore_dir/
vga_de_v_2/vga_sync/iseconfig/
vga_de_v_2/vga_sync/iseconfig/top.xreport
vga_de_v_2/vga_sync/iseconfig/vga_sync.projectmgr
vga_de_v_2/vga_sync/iseconfig/vga_sync.xreport
vga_de_v_2/vga_sync/isim/
vga_de_v_2/vga_sync/isim.cmd
vga_de_v_2/vga_sync/isim.log
vga_de_v_2/vga_sync/isim/isim_usage_statistics.html
vga_de_v_2/vga_sync/isim/pn_info
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/isimcrash.log
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/isimkernel.log
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/netId.dat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/TEST_isim_beh.exe
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/tmp_save/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/tmp_save/_1
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.nt.obj
vga_de_v_2/vga_sync/isim/work/
vga_de_v_2/vga_sync/isim/work/@t@e@s@t.sdb
vga_de_v_2/vga_sync/isim/work/glbl.sdb
vga_de_v_2/vga_sync/isim/work/vga_sync.sdb
vga_de_v_2/vga_sync/mb/
vga_de_v_2/vga_sync/mb/clock_generator_0.log
vga_de_v_2/vga_sync/mb/data/
vga_de_v_2/vga_sync/mb/data/mb.ucf
vga_de_v_2/vga_sync/mb/etc/
vga_de_v_2/vga_sync/mb/etc/bitgen.ut
vga_de_v_2/vga_sync/mb/etc/bitgen.ut.virtex5
vga_de_v_2/vga_sync/mb/etc/download.cmd
vga_de_v_2/vga_sync/mb/etc/fast_runtime.opt
vga_de_v_2/vga_sync/mb/etc/fast_runtime.opt.virtex5
vga_de_v_2/vga_sync/mb/mb.bsb
vga_de_v_2/vga_sync/mb/mb.create.tcl
vga_de_v_2/vga_sync/mb/mb.log
vga_de_v_2/vga_sync/mb/mb.make
vga_de_v_2/vga_sync/mb/mb.mhs
vga_de_v_2/vga_sync/mb/mb.remove.tcl
vga_de_v_2/vga_sync/mb/mb.xmp
vga_de_v_2/vga_sync/mb/mb_incl.make
vga_de_v_2/vga_sync/mb/pcores/
vga_de_v_2/vga_sync/mb/pn_processor_info
vga_de_v_2/vga_sync/mb/__xps/
vga_de_v_2/vga_sync/mb/__xps/bitinit.opt
vga_de_v_2/vga_sync/mb/__xps/ise/
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpssim
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpssyn
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpsupb
vga_de_v_2/vga_sync/mb/__xps/ise/xmsgprops.lst
vga_de_v_2/vga_sync/mb/__xps/ise/_xmsgs/
vga_de_v_2/vga_sync/mb/__xps/platgen.opt
vga_de_v_2/vga_sync/mb/__xps/simgen.opt
vga_de_v_2/vga_sync/mb/__xps/xplorer.opt
vga_de_v_2/vga_sync/mb/__xps/xpsxflow.opt
vga_de_v_2/vga_sync/netgen/
vga_de_v_2/vga_sync/netgen/par/
vga_de_v_2/vga_sync/netgen/par/top_timesim.nlf
vga_de_v_2/vga_sync/netgen/par/top_timesim.sdf
vga_de_v_2/vga_sync/netgen/par/top_timesim.v
vga_de_v_2/vga_sync/par_usage_statistics.html
vga_de_v_2/vga_sync/pll.v
vga_de_v_2/vga_sync/pll_clkin.v
vga_de_v_2/vga_sync/TEST.v
vga_de_v_2/vga_sync/TEST_beh.prj
vga_de_v_2/vga_sync/TEST_isim_beh.exe
vga_de_v_2/vga_sync/TEST_isim_beh.wdb
vga_de_v_2/vga_sync/TEST_par.prj
vga_de_v_2/vga_sync/top.bgn
vga_de_v_2/vga_sync/top.bit
vga_de_v_2/vga_sync/top.bld
vga_de_v_2/vga_sync/top.cmd_log
vga_de_v_2/vga_sync/top.drc
vga_de_v_2/vga_sync/top.lso
vga_de_v_2/vga_sync/top.ncd
vga_de_v_2/vga_sync/top.ngc
vga_de_v_2/vga_sync/top.ngd
vga_de_v_2/vga_sync/top.ngr
vga_de_v_2/vga_sync/top.pad
vga_de_v_2/vga_sync/top.par
vga_de_v_2/vga_sync/top.pcf
vga_de_v_2/vga_sync/top.prj
vga_de_v_2/vga_sync/top.ptwx
vga_de_v_2/vga_sync/top.stx
vga_de_v_2/vga_sync/top.syr
vga_de_v_2/vga_sync/top.twr
vga_de_v_2/vga_sync/top.twx
vga_de_v_2/vga_sync/top.unroutes
vga_de_v_2/vga_sync/top.ut
vga_de_v_2/vga_sync/top.v
vga_de_v_2/vga_sync/top.xpi
vga_de_v_2/vga_sync/top.xst
vga_de_v_2/vga_sync/top_bitgen.xwbt
vga_de_v_2/vga_sync/top_envsettings.html
vga_de_v_2/vga_sync/top_guide.ncd
vga_de_v_2/vga_sync/top_map.map
vga_de_v_2/vga_sync/top_map.mrp
vga_de_v_2/vga_sync/top_map.ncd
vga_de_v_2/vga_sync/top_map.ngm
vga_de_v_2/vga_sync/top_map.xrpt
vga_de_v_2/vga_sync/top_ngdbuild.xrpt
vga_de_v_2/vga_sync/top_pad.csv
vga_de_v_2/vga_sync/top_pad.txt
vga_de_v_2/vga_sync/top_par.xrpt
vga_de_v_2/vga_sync/top_summary.html
vga_de_v_2/vga_sync/top_summary.xml
vga_de_v_2/vga_sync/top_usage.xml
vga_de_v_2/vga_s
vga_de_v_2/vga_sync/
vga_de_v_2/vga_sync/clk_out.v
vga_de_v_2/vga_sync/color_control.v
vga_de_v_2/vga_sync/fuse.log
vga_de_v_2/vga_sync/fuse.xmsgs
vga_de_v_2/vga_sync/fuseRelaunch.cmd
vga_de_v_2/vga_sync/ipcore_dir/
vga_de_v_2/vga_sync/iseconfig/
vga_de_v_2/vga_sync/iseconfig/top.xreport
vga_de_v_2/vga_sync/iseconfig/vga_sync.projectmgr
vga_de_v_2/vga_sync/iseconfig/vga_sync.xreport
vga_de_v_2/vga_sync/isim/
vga_de_v_2/vga_sync/isim.cmd
vga_de_v_2/vga_sync/isim.log
vga_de_v_2/vga_sync/isim/isim_usage_statistics.html
vga_de_v_2/vga_sync/isim/pn_info
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/isimcrash.log
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/isimkernel.log
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/netId.dat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/TEST_isim_beh.exe
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/tmp_save/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/tmp_save/_1
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000002439537580_1087167475.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000003308846147_2203017034.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.c
vga_de_v_2/vga_sync/isim/TEST_isim_beh.exe.sim/work/TEST_isim_beh.exe_main.nt.obj
vga_de_v_2/vga_sync/isim/work/
vga_de_v_2/vga_sync/isim/work/@t@e@s@t.sdb
vga_de_v_2/vga_sync/isim/work/glbl.sdb
vga_de_v_2/vga_sync/isim/work/vga_sync.sdb
vga_de_v_2/vga_sync/mb/
vga_de_v_2/vga_sync/mb/clock_generator_0.log
vga_de_v_2/vga_sync/mb/data/
vga_de_v_2/vga_sync/mb/data/mb.ucf
vga_de_v_2/vga_sync/mb/etc/
vga_de_v_2/vga_sync/mb/etc/bitgen.ut
vga_de_v_2/vga_sync/mb/etc/bitgen.ut.virtex5
vga_de_v_2/vga_sync/mb/etc/download.cmd
vga_de_v_2/vga_sync/mb/etc/fast_runtime.opt
vga_de_v_2/vga_sync/mb/etc/fast_runtime.opt.virtex5
vga_de_v_2/vga_sync/mb/mb.bsb
vga_de_v_2/vga_sync/mb/mb.create.tcl
vga_de_v_2/vga_sync/mb/mb.log
vga_de_v_2/vga_sync/mb/mb.make
vga_de_v_2/vga_sync/mb/mb.mhs
vga_de_v_2/vga_sync/mb/mb.remove.tcl
vga_de_v_2/vga_sync/mb/mb.xmp
vga_de_v_2/vga_sync/mb/mb_incl.make
vga_de_v_2/vga_sync/mb/pcores/
vga_de_v_2/vga_sync/mb/pn_processor_info
vga_de_v_2/vga_sync/mb/__xps/
vga_de_v_2/vga_sync/mb/__xps/bitinit.opt
vga_de_v_2/vga_sync/mb/__xps/ise/
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpssim
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpssyn
vga_de_v_2/vga_sync/mb/__xps/ise/mb.xpsupb
vga_de_v_2/vga_sync/mb/__xps/ise/xmsgprops.lst
vga_de_v_2/vga_sync/mb/__xps/ise/_xmsgs/
vga_de_v_2/vga_sync/mb/__xps/platgen.opt
vga_de_v_2/vga_sync/mb/__xps/simgen.opt
vga_de_v_2/vga_sync/mb/__xps/xplorer.opt
vga_de_v_2/vga_sync/mb/__xps/xpsxflow.opt
vga_de_v_2/vga_sync/netgen/
vga_de_v_2/vga_sync/netgen/par/
vga_de_v_2/vga_sync/netgen/par/top_timesim.nlf
vga_de_v_2/vga_sync/netgen/par/top_timesim.sdf
vga_de_v_2/vga_sync/netgen/par/top_timesim.v
vga_de_v_2/vga_sync/par_usage_statistics.html
vga_de_v_2/vga_sync/pll.v
vga_de_v_2/vga_sync/pll_clkin.v
vga_de_v_2/vga_sync/TEST.v
vga_de_v_2/vga_sync/TEST_beh.prj
vga_de_v_2/vga_sync/TEST_isim_beh.exe
vga_de_v_2/vga_sync/TEST_isim_beh.wdb
vga_de_v_2/vga_sync/TEST_par.prj
vga_de_v_2/vga_sync/top.bgn
vga_de_v_2/vga_sync/top.bit
vga_de_v_2/vga_sync/top.bld
vga_de_v_2/vga_sync/top.cmd_log
vga_de_v_2/vga_sync/top.drc
vga_de_v_2/vga_sync/top.lso
vga_de_v_2/vga_sync/top.ncd
vga_de_v_2/vga_sync/top.ngc
vga_de_v_2/vga_sync/top.ngd
vga_de_v_2/vga_sync/top.ngr
vga_de_v_2/vga_sync/top.pad
vga_de_v_2/vga_sync/top.par
vga_de_v_2/vga_sync/top.pcf
vga_de_v_2/vga_sync/top.prj
vga_de_v_2/vga_sync/top.ptwx
vga_de_v_2/vga_sync/top.stx
vga_de_v_2/vga_sync/top.syr
vga_de_v_2/vga_sync/top.twr
vga_de_v_2/vga_sync/top.twx
vga_de_v_2/vga_sync/top.unroutes
vga_de_v_2/vga_sync/top.ut
vga_de_v_2/vga_sync/top.v
vga_de_v_2/vga_sync/top.xpi
vga_de_v_2/vga_sync/top.xst
vga_de_v_2/vga_sync/top_bitgen.xwbt
vga_de_v_2/vga_sync/top_envsettings.html
vga_de_v_2/vga_sync/top_guide.ncd
vga_de_v_2/vga_sync/top_map.map
vga_de_v_2/vga_sync/top_map.mrp
vga_de_v_2/vga_sync/top_map.ncd
vga_de_v_2/vga_sync/top_map.ngm
vga_de_v_2/vga_sync/top_map.xrpt
vga_de_v_2/vga_sync/top_ngdbuild.xrpt
vga_de_v_2/vga_sync/top_pad.csv
vga_de_v_2/vga_sync/top_pad.txt
vga_de_v_2/vga_sync/top_par.xrpt
vga_de_v_2/vga_sync/top_summary.html
vga_de_v_2/vga_sync/top_summary.xml
vga_de_v_2/vga_sync/top_usage.xml
vga_de_v_2/vga_s
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.