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文件名称:DELAY1

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  • 上传时间:
    2008-10-13
  • 文件大小:
    1.26mb
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    0次
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介绍说明--下载内容来自于网络,使用问题请自行百度

本程序以ISE为开发平台,采用VHDL为开发语言,实现了对一个时钟信号延时的功能-the procedures to ISE for the development platform for the development of VHDL language, Implementation of a clock signal delay function
(系统自动生成,下载前可以参看下载内容)

下载文件列表

DELAY_tbw1.ano
DELAY_tbw1.fdo
DELAY_tbw1.jhd
DELAY_tbw1.tbw
DELAY_tbw1.udo
DELAY_tbw1.xwv
DELAY_tbw1.xwv_bak
DELAY_tbw1_beh.prj
DELAY_tbw1_gen.prj
DELAY_tbw1_isim_beh.exe
DELAY_tbw1_tbxr.exe
DELAY_tbw2.ado
DELAY_tbw2.ano
DELAY_tbw2.jhd
DELAY_tbw2.tbw
DELAY_tbw2.vhw
DELAY_tbw2.xwv
DELAY_tbw2.xwv_bak
DELAY_tbw2_beh.prj
DELAY_tbw2_gen.prj
DELAY_tbw2_isim_beh.exe
DELAY_tbw2_tbxr.exe
DELAY_tbw3.ado
DELAY_tbw3.ano
DELAY_tbw3.ant
DELAY_tbw3.fdo
DELAY_tbw3.jhd
DELAY_tbw3.tbw
DELAY_tbw3.udo
DELAY_tbw3.vhw
DELAY_tbw3.xwv
DELAY_tbw3.xwv_bak
DELAY_tbw3_beh.prj
DELAY_tbw3_bencher.prj
DELAY_tbw3_gen.prj
DELAY_tbw3_isim_beh.exe
DELAY_tbw3_tbxr.exe
DELAY_tbw.ano
DELAY_tbw.fdo
DELAY_tbw.jhd
DELAY_tbw.tbw
DELAY_tbw.udo
DELAY_tbw.vhw
DELAY_tbw.xwv
DELAY_tbw.xwv_bak
DELAY_tbw_beh.prj
DELAY_tbw_gen.prj
DELAY_tbw_isim_beh.exe
DELAY_tbw_tbxr.exe
DELAY_VHD.ncd
DELAY_VHD.prj
DELAY_VHD.vhd
DELAY_VHD.bld
DELAY_VHD.cmd_log
DELAY_VHD.lso
DELAY_VHD.ngc
DELAY_VHD.ngd
DELAY_VHD.ngr
DELAY_VHD.pad
DELAY_VHD.par
DELAY_VHD.pcf
DELAY_VHD.stx
DELAY_VHD.syr
delay_vhd.twr
delay_vhd.twx
DELAY_VHD.unroutes
DELAY_VHD.xpi
DELAY_VHD.xst
DELAY_VHD_last_par.ncd
DELAY_VHD_map.ncd
DELAY_VHD_map.mrp
DELAY_VHD_map.ngm
DELAY_VHD_pad.csv
DELAY_VHD_pad.txt
DELAY_VHD_prev_built.ngd
DELAY_VHD_summary.html
DELAY_VHD_usage.xml
genExpectedResults.cmd
isim.cmd
isim.log
isim.hdlsourcefiles
isimwavedata.xwv
pepExtractor.prj
results.txt
transcript
vsim.wlf
xilinxsim.ini
_ngo/netlist.lst
_xmsgs/fuse.xmsgs
_xmsgs/map.xmsgs
_xmsgs/netgen.xmsgs
_xmsgs/ngdbuild.xmsgs
_xmsgs/par.xmsgs
_xmsgs/trce.xmsgs
_xmsgs/vhpcomp.xmsgs
_xmsgs/xst.xmsgs
isim/work/delay_tbw/mingw/testbench_arch.obj
isim/work/delay_tbw/testbench_arch.h
isim/work/delay_tbw/xsimtestbench_arch.cpp
isim/work/delay_tbw1/mingw/testbench_arch.obj
isim/work/delay_tbw1/testbench_arch.h
isim/work/delay_tbw1/xsimtestbench_arch.cpp
isim/work/delay_tbw2/mingw/testbench_arch.obj
isim/work/delay_tbw2/testbench_arch.h
isim/work/delay_tbw2/xsimtestbench_arch.cpp
isim/work/delay_tbw3/mingw/testbench_arch.obj
isim/work/delay_tbw3/testbench_arch.h
isim/work/delay_tbw3/xsimtestbench_arch.cpp
isim/work/delay_vhd/behavioral.h
isim/work/delay_vhd/mingw/behavioral.obj
isim/work/hdllib.ref
isim/work/hdpdeps.ref
isim/work/sub00/vhpl00.vho
isim/work/sub00/vhpl01.vho
isim/work/sub00/vhpl02.vho
isim/work/sub00/vhpl03.vho
isim/work/sub00/vhpl04.vho
isim/work/sub00/vhpl05.vho
isim/work/sub00/vhpl06.vho
isim/work/sub00/vhpl07.vho
isim/work/sub00/vhpl08.vho
isim/work/sub00/vhpl09.vho
isim.tmp_save/_1
netgen/synthesis/DELAY_VHD_synthesis.nlf
netgen/synthesis/DELAY_VHD_synthesis.v
work/delay_tbw/testbench_arch.dat
work/delay_tbw/_primary.dat
work/delay_tbw1/testbench_arch.dat
work/delay_tbw1/_primary.dat
work/delay_tbw2/_primary.dat
work/delay_tbw3/testbench_arch.dat
work/delay_tbw3/_primary.dat
work/delay_vhd/behavioral.dat
work/delay_vhd/_primary.dat
work/_info
work/_opt/work_delay_tbw_testbench_arch.asm
work/_opt/work_delay_vhd_behavioral.asm
work/_opt/work__info
work/_opt/_deps
work/_opt/__model_tech_.._ieee__info
work/_opt/__model_tech_.._std__info
work/_opt1/work_delay_tbw1_testbench_arch.asm
work/_opt1/work_delay_vhd_behavioral.asm
work/_opt1/work__info
work/_opt1/_deps
work/_opt1/__model_tech_.._ieee__info
work/_opt1/__model_tech_.._std__info
work/_opt2/work_delay_tbw3_testbench_arch.asm
work/_opt2/work_delay_vhd_behavioral.asm
work/_opt2/work__info
work/_opt2/_deps
work/_opt2/__model_tech_.._ieee__info
work/_opt2/__model_tech_.._std__info
xst/dump.xst/DELAY_VHD.prj/ntrc.scr
xst/work/hdllib.ref
xst/work/hdpdeps.ref
xst/work/sub00/vhpl00.vho
xst/work/sub00/vhpl01.vho
DELAY1.ise
DELAY1.ise_ISE_Backup
DELAY1.ntrc_log
DELAY_tbw.ado
DELAY_tbw1.ado
xst/dump.xst/DELAY_VHD.prj/ngx/notopt
xst/dump.xst/DELAY_VHD.prj/ngx/opt
isim/work/delay_tbw/mingw
isim/work/delay_tbw1/mingw
isim/work/delay_tbw2/mingw
isim/work/delay_tbw3/mingw
isim/work/delay_vhd/mingw
xst/dump.xst/DELAY_VHD.prj/ngx
isim/work/delay_tbw
isim/work/delay_tbw1
isim/work/delay_tbw2
isim/work/delay_tbw3
isim/work/delay_vhd
isim/work/sub00
xst/dump.xst/DELAY_VHD.prj
xst/work/sub00
isim/work
netgen/synthesis
work/delay_tbw
work/delay_tbw1
work/delay_tbw2
work/delay_tbw3
work/delay_vhd
work/_opt
work/_opt1
work/_opt2
work/_temp
xst/dump.xst
xst/projnav.tmp
xst/work
_ngo
_xmsgs
isim
isim.tmp_save
netgen
work
xst
www.dssz.com.txt

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