文件名称:fulleradder
介绍说明－－下载内容来自于网络，使用问题请自行百度
本程序以Modelsim为开发平台，采用VHDL为开发语言，实现了简单的全加器．适合初学Modelsim的同行-Modelsim the procedures for the development of a platform for the development of VHDL language, achieving a simple full adder. Suitable for a novice counterparts Modelsim
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下载文件列表
FullAdder.vhd.bak
top.vhd
top.vhd.bak
vsim.wlf
wave.do
work/full_adder/behavioral.dat
work/full_adder/_primary.dat
work/_info
work/_opt/work_full_adder_behavioral.asm
work/_opt/work__info
work/_opt/_deps
work/_opt/__model_tech_.._ieee__info
work/_opt/__model_tech_.._std__info
FullAdder.mpf
FullAdder.vhd
FullAdder1.mpf
FullAdder1.cr.mti
FullAdder.cr.mti
work/full_adder
work/_opt
work
www.dssz.com.txt
top.vhd
top.vhd.bak
vsim.wlf
wave.do
work/full_adder/behavioral.dat
work/full_adder/_primary.dat
work/_info
work/_opt/work_full_adder_behavioral.asm
work/_opt/work__info
work/_opt/_deps
work/_opt/__model_tech_.._ieee__info
work/_opt/__model_tech_.._std__info
FullAdder.mpf
FullAdder.vhd
FullAdder1.mpf
FullAdder1.cr.mti
FullAdder.cr.mti
work/full_adder
work/_opt
work
www.dssz.com.txt
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