文件名称:shuzishizhong-verilog
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文件大小:1.07mb
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基于2410开发板数字时钟的开发,实现了计时,日期,跑表的功能-Based on the development of the 2410 development board digital clock, a time, date, stopwatch function
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下载文件列表
shuzishizhong-verilog/clock.asm.rpt
shuzishizhong-verilog/clock.done
shuzishizhong-verilog/clock.fit.rpt
shuzishizhong-verilog/clock.fit.smsg
shuzishizhong-verilog/clock.fit.summary
shuzishizhong-verilog/clock.flow.rpt
shuzishizhong-verilog/clock.map.rpt
shuzishizhong-verilog/clock.map.smsg
shuzishizhong-verilog/clock.map.summary
shuzishizhong-verilog/clock.pin
shuzishizhong-verilog/clock.pof
shuzishizhong-verilog/clock.qpf
shuzishizhong-verilog/clock.qsf
shuzishizhong-verilog/clock.qws
shuzishizhong-verilog/clock.sof
shuzishizhong-verilog/clock.tan.rpt
shuzishizhong-verilog/clock.tan.summary
shuzishizhong-verilog/clock.v
shuzishizhong-verilog/clock.v.bak
shuzishizhong-verilog/db/clock.(0).cnf.cdb
shuzishizhong-verilog/db/clock.(0).cnf.hdb
shuzishizhong-verilog/db/clock.asm.qmsg
shuzishizhong-verilog/db/clock.asm_labs.ddb
shuzishizhong-verilog/db/clock.cbx.xml
shuzishizhong-verilog/db/clock.cmp.bpm
shuzishizhong-verilog/db/clock.cmp.cdb
shuzishizhong-verilog/db/clock.cmp.ecobp
shuzishizhong-verilog/db/clock.cmp.hdb
shuzishizhong-verilog/db/clock.cmp.kpt
shuzishizhong-verilog/db/clock.cmp.logdb
shuzishizhong-verilog/db/clock.cmp.rdb
shuzishizhong-verilog/db/clock.cmp.tdb
shuzishizhong-verilog/db/clock.cmp0.ddb
shuzishizhong-verilog/db/clock.cmp2.ddb
shuzishizhong-verilog/db/clock.cmp_merge.kpt
shuzishizhong-verilog/db/clock.db_info
shuzishizhong-verilog/db/clock.eco.cdb
shuzishizhong-verilog/db/clock.fit.qmsg
shuzishizhong-verilog/db/clock.hier_info
shuzishizhong-verilog/db/clock.hif
shuzishizhong-verilog/db/clock.lpc.html
shuzishizhong-verilog/db/clock.lpc.rdb
shuzishizhong-verilog/db/clock.lpc.txt
shuzishizhong-verilog/db/clock.map.bpm
shuzishizhong-verilog/db/clock.map.cdb
shuzishizhong-verilog/db/clock.map.ecobp
shuzishizhong-verilog/db/clock.map.hdb
shuzishizhong-verilog/db/clock.map.kpt
shuzishizhong-verilog/db/clock.map.logdb
shuzishizhong-verilog/db/clock.map.qmsg
shuzishizhong-verilog/db/clock.map_bb.cdb
shuzishizhong-verilog/db/clock.map_bb.hdb
shuzishizhong-verilog/db/clock.map_bb.logdb
shuzishizhong-verilog/db/clock.pre_map.cdb
shuzishizhong-verilog/db/clock.pre_map.hdb
shuzishizhong-verilog/db/clock.rtlv.hdb
shuzishizhong-verilog/db/clock.rtlv_sg.cdb
shuzishizhong-verilog/db/clock.rtlv_sg_swap.cdb
shuzishizhong-verilog/db/clock.sgdiff.cdb
shuzishizhong-verilog/db/clock.sgdiff.hdb
shuzishizhong-verilog/db/clock.sld_design_entry.sci
shuzishizhong-verilog/db/clock.sld_design_entry_dsc.sci
shuzishizhong-verilog/db/clock.smp_dump.txt
shuzishizhong-verilog/db/clock.syn_hier_info
shuzishizhong-verilog/db/clock.tan.qmsg
shuzishizhong-verilog/db/clock.tis_db_list.ddb
shuzishizhong-verilog/db/clock.tmw_info
shuzishizhong-verilog/db/clock_global_asgn_op.abo
shuzishizhong-verilog/db/prev_cmp_clock.asm.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.fit.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.map.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.tan.qmsg
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.atm
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.dfp
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.hdbx
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.kpt
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.logdb
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.rcf
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.atm
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.dpi
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.hdbx
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.kpt
shuzishizhong-verilog/incremental_db/README
shuzishizhong-verilog/incremental_db/compiled_partitions
shuzishizhong-verilog/db
shuzishizhong-verilog/incremental_db
shuzishizhong-verilog
shuzishizhong-verilog/clock.done
shuzishizhong-verilog/clock.fit.rpt
shuzishizhong-verilog/clock.fit.smsg
shuzishizhong-verilog/clock.fit.summary
shuzishizhong-verilog/clock.flow.rpt
shuzishizhong-verilog/clock.map.rpt
shuzishizhong-verilog/clock.map.smsg
shuzishizhong-verilog/clock.map.summary
shuzishizhong-verilog/clock.pin
shuzishizhong-verilog/clock.pof
shuzishizhong-verilog/clock.qpf
shuzishizhong-verilog/clock.qsf
shuzishizhong-verilog/clock.qws
shuzishizhong-verilog/clock.sof
shuzishizhong-verilog/clock.tan.rpt
shuzishizhong-verilog/clock.tan.summary
shuzishizhong-verilog/clock.v
shuzishizhong-verilog/clock.v.bak
shuzishizhong-verilog/db/clock.(0).cnf.cdb
shuzishizhong-verilog/db/clock.(0).cnf.hdb
shuzishizhong-verilog/db/clock.asm.qmsg
shuzishizhong-verilog/db/clock.asm_labs.ddb
shuzishizhong-verilog/db/clock.cbx.xml
shuzishizhong-verilog/db/clock.cmp.bpm
shuzishizhong-verilog/db/clock.cmp.cdb
shuzishizhong-verilog/db/clock.cmp.ecobp
shuzishizhong-verilog/db/clock.cmp.hdb
shuzishizhong-verilog/db/clock.cmp.kpt
shuzishizhong-verilog/db/clock.cmp.logdb
shuzishizhong-verilog/db/clock.cmp.rdb
shuzishizhong-verilog/db/clock.cmp.tdb
shuzishizhong-verilog/db/clock.cmp0.ddb
shuzishizhong-verilog/db/clock.cmp2.ddb
shuzishizhong-verilog/db/clock.cmp_merge.kpt
shuzishizhong-verilog/db/clock.db_info
shuzishizhong-verilog/db/clock.eco.cdb
shuzishizhong-verilog/db/clock.fit.qmsg
shuzishizhong-verilog/db/clock.hier_info
shuzishizhong-verilog/db/clock.hif
shuzishizhong-verilog/db/clock.lpc.html
shuzishizhong-verilog/db/clock.lpc.rdb
shuzishizhong-verilog/db/clock.lpc.txt
shuzishizhong-verilog/db/clock.map.bpm
shuzishizhong-verilog/db/clock.map.cdb
shuzishizhong-verilog/db/clock.map.ecobp
shuzishizhong-verilog/db/clock.map.hdb
shuzishizhong-verilog/db/clock.map.kpt
shuzishizhong-verilog/db/clock.map.logdb
shuzishizhong-verilog/db/clock.map.qmsg
shuzishizhong-verilog/db/clock.map_bb.cdb
shuzishizhong-verilog/db/clock.map_bb.hdb
shuzishizhong-verilog/db/clock.map_bb.logdb
shuzishizhong-verilog/db/clock.pre_map.cdb
shuzishizhong-verilog/db/clock.pre_map.hdb
shuzishizhong-verilog/db/clock.rtlv.hdb
shuzishizhong-verilog/db/clock.rtlv_sg.cdb
shuzishizhong-verilog/db/clock.rtlv_sg_swap.cdb
shuzishizhong-verilog/db/clock.sgdiff.cdb
shuzishizhong-verilog/db/clock.sgdiff.hdb
shuzishizhong-verilog/db/clock.sld_design_entry.sci
shuzishizhong-verilog/db/clock.sld_design_entry_dsc.sci
shuzishizhong-verilog/db/clock.smp_dump.txt
shuzishizhong-verilog/db/clock.syn_hier_info
shuzishizhong-verilog/db/clock.tan.qmsg
shuzishizhong-verilog/db/clock.tis_db_list.ddb
shuzishizhong-verilog/db/clock.tmw_info
shuzishizhong-verilog/db/clock_global_asgn_op.abo
shuzishizhong-verilog/db/prev_cmp_clock.asm.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.fit.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.map.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.qmsg
shuzishizhong-verilog/db/prev_cmp_clock.tan.qmsg
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.atm
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.dfp
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.hdbx
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.kpt
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.logdb
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.cmp.rcf
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.atm
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.dpi
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.hdbx
shuzishizhong-verilog/incremental_db/compiled_partitions/clock.root_partition.map.kpt
shuzishizhong-verilog/incremental_db/README
shuzishizhong-verilog/incremental_db/compiled_partitions
shuzishizhong-verilog/db
shuzishizhong-verilog/incremental_db
shuzishizhong-verilog
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