文件名称:VHDL
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含有常用组合电路模块的设计和应用这个实验所需的VHDL的代码,用modelsim仿真并建立了ISE文件-VHDL code module containing commonly used combination of circuit design and application required by this experiment, the simulation with modelsim and ISE file
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下载文件列表
代码及报告/
代码及报告/design1/
代码及报告/design1/ise/
代码及报告/design1/ise/abs/
代码及报告/design1/ise/abs/.lso
代码及报告/design1/ise/abs/abs.ipf
代码及报告/design1/ise/abs/abs.ipf_ISE_Backup
代码及报告/design1/ise/abs/abs.ise
代码及报告/design1/ise/abs/abs.ise_ISE_Backup
代码及报告/design1/ise/abs/abs.ntrc_log
代码及报告/design1/ise/abs/abs.restore
代码及报告/design1/ise/abs/abs_dif.bgn
代码及报告/design1/ise/abs/abs_dif.bit
代码及报告/design1/ise/abs/abs_dif.bld
代码及报告/design1/ise/abs/abs_dif.cmd_log
代码及报告/design1/ise/abs/abs_dif.drc
代码及报告/design1/ise/abs/abs_dif.lfp
代码及报告/design1/ise/abs/abs_dif.lso
代码及报告/design1/ise/abs/abs_dif.ncd
代码及报告/design1/ise/abs/abs_dif.ngc
代码及报告/design1/ise/abs/abs_dif.ngd
代码及报告/design1/ise/abs/abs_dif.ngr
代码及报告/design1/ise/abs/abs_dif.pad
代码及报告/design1/ise/abs/abs_dif.par
代码及报告/design1/ise/abs/abs_dif.pcf
代码及报告/design1/ise/abs/abs_dif.prj
代码及报告/design1/ise/abs/abs_dif.stx
代码及报告/design1/ise/abs/abs_dif.syr
代码及报告/design1/ise/abs/abs_dif.twr
代码及报告/design1/ise/abs/abs_dif.twx
代码及报告/design1/ise/abs/abs_dif.ucf
代码及报告/design1/ise/abs/abs_dif.unroutes
代码及报告/design1/ise/abs/abs_dif.ut
代码及报告/design1/ise/abs/abs_dif.v
代码及报告/design1/ise/abs/abs_dif.xpi
代码及报告/design1/ise/abs/abs_dif.xst
代码及报告/design1/ise/abs/abs_dif_guide.ncd
代码及报告/design1/ise/abs/abs_dif_map.map
代码及报告/design1/ise/abs/abs_dif_map.mrp
代码及报告/design1/ise/abs/abs_dif_map.ncd
代码及报告/design1/ise/abs/abs_dif_map.ngm
代码及报告/design1/ise/abs/abs_dif_pad.csv
代码及报告/design1/ise/abs/abs_dif_pad.txt
代码及报告/design1/ise/abs/abs_dif_prev_built.ngd
代码及报告/design1/ise/abs/abs_dif_summary.html
代码及报告/design1/ise/abs/abs_dif_summary.xml
代码及报告/design1/ise/abs/abs_dif_tb.fdo
代码及报告/design1/ise/abs/abs_dif_tb.udo
代码及报告/design1/ise/abs/abs_dif_tb.v
代码及报告/design1/ise/abs/abs_dif_usage.xml
代码及报告/design1/ise/abs/comp.v
代码及报告/design1/ise/abs/comp_tb.v
代码及报告/design1/ise/abs/full_adder.v
代码及报告/design1/ise/abs/full_adder_tb.v
代码及报告/design1/ise/abs/mux_2to1.v
代码及报告/design1/ise/abs/mux_2to1_tb.v
代码及报告/design1/ise/abs/transcript
代码及报告/design1/ise/abs/vsim.wlf
代码及报告/design1/ise/abs/work/
代码及报告/design1/ise/abs/work/abs_dif/
代码及报告/design1/ise/abs/work/abs_dif/verilog.asm
代码及报告/design1/ise/abs/work/abs_dif/_primary.dat
代码及报告/design1/ise/abs/work/abs_dif/_primary.vhd
代码及报告/design1/ise/abs/work/abs_dif_tb/
代码及报告/design1/ise/abs/work/abs_dif_tb/verilog.asm
代码及报告/design1/ise/abs/work/abs_dif_tb/_primary.dat
代码及报告/design1/ise/abs/work/abs_dif_tb/_primary.vhd
代码及报告/design1/ise/abs/work/comp/
代码及报告/design1/ise/abs/work/comp/verilog.asm
代码及报告/design1/ise/abs/work/comp/_primary.dat
代码及报告/design1/ise/abs/work/comp/_primary.vhd
代码及报告/design1/ise/abs/work/full_adder/
代码及报告/design1/ise/abs/work/full_adder/verilog.asm
代码及报告/design1/ise/abs/work/full_adder/_primary.dat
代码及报告/design1/ise/abs/work/full_adder/_primary.vhd
代码及报告/design1/ise/abs/work/glbl/
代码及报告/design1/ise/abs/work/glbl/verilog.asm
代码及报告/design1/ise/abs/work/glbl/_primary.dat
代码及报告/design1/ise/abs/work/glbl/_primary.vhd
代码及报告/design1/ise/abs/work/mux_2to1/
代码及报告/design1/ise/abs/work/mux_2to1/verilog.asm
代码及报告/design1/ise/abs/work/mux_2to1/_primary.dat
代码及报告/design1/ise/abs/work/mux_2to1/_primary.vhd
代码及报告/design1/ise/abs/work/_info
代码及报告/design1/ise/abs/xst/
代码及报告/design1/ise/abs/xst/dump.xst/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/notopt/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/opt/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ntrc.scr
代码及报告/design1/ise/abs/xst/projnav.tmp/
代码及报告/design1/ise/abs/xst/work/
代码及报告/design1/ise/abs/xst/work/hdllib.ref
代码及报告/design1/ise/abs/xst/work/vlg10/
代码及报告/design1/ise/abs/xst/work/vlg10/abs__dif.bin
代码及报告/design1/ise/abs/xst/work/vlg27/
代码及报告/design1/ise/abs/xst/work/vlg27/mux__2to1.bin
代码及报告/design1/ise/abs/xst/work/vlg3F/
代码及报告/design1/ise/abs/xst/work/vlg3F/comp.bin
代码及报告/design1/ise/abs/xst/work/vlg5A/
代码及报告/design1/ise/abs/xst/work/vlg5A/full__adder.bin
代码及报告/design1/ise/abs/_impact.cmd
代码及报告/design1/ise/abs/_impact.log
代码及报告/design1/ise/abs/_ngo/
代码及报告/design1/ise/abs/_ngo/netlist.lst
代码及报告/design1/ise/abs/_xmsgs/
代码及报告/design1/ise/abs/_xmsgs/bitgen.xmsgs
代码及报告/design1/ise/abs/_xmsgs/map.xmsgs
代码及报告/design1/ise/abs/_xmsgs/ngdbuild.xmsgs
代码及报告/design1/ise/abs/_xmsgs/par.xmsgs
代码及报告/design1/ise/abs/_xmsgs/trce.xmsgs
代码及报告/design1/ise/abs/_xmsgs/xst.xmsgs
代码及报告/design1/sim/
代码及报告/design1/sim/abs.cr.mti
代码及报告/design1/sim/abs.mpf
代码及报告/design1/sim/vsim.wlf
代码及报告/design1/sim/work/
代码及报告/design1/sim/work/@_opt/
代码及报告/design1/sim/work/@_opt1/
代码及报告/design1/sim/work/@_opt1/vopt1a9m7j
代码及报告/design1/sim/work/@_opt1/vopt4a3iqh
代码及报告/design1/sim/work/@_opt1/vopt87ve86
代码及报告/design1/sim/work/@_opt1/vopti0a2bn
代码及报告/design1/sim/work/@_opt1/voptt0mvan
代码及报告/design1/sim/work/@_opt1/voptx9frqk
代码及报告/design1/sim/work/@_opt1/_deps
代码及报告/design1/sim/work/@_opt2/
代码及报告/design1/sim/work/@_opt2/vopt1xd0iw
代码及报告/design1/sim/work/@_opt2/vopt1zyx11
代码及报告/design1/sim/work/@_opt2/vopt56et43
代码及报告/design1/sim/work/@_opt2/vopt5x7w1v
代码及报告/design1/sim/work/@_opt2/vopt868qk1
代码及报告/design1/sim/work/@_opt2/vopt8bek3z
代码及报告/design1/sim/work/@_opt2/voptb7ehzg
代码及报告/design1/si
代码及报告/design1/
代码及报告/design1/ise/
代码及报告/design1/ise/abs/
代码及报告/design1/ise/abs/.lso
代码及报告/design1/ise/abs/abs.ipf
代码及报告/design1/ise/abs/abs.ipf_ISE_Backup
代码及报告/design1/ise/abs/abs.ise
代码及报告/design1/ise/abs/abs.ise_ISE_Backup
代码及报告/design1/ise/abs/abs.ntrc_log
代码及报告/design1/ise/abs/abs.restore
代码及报告/design1/ise/abs/abs_dif.bgn
代码及报告/design1/ise/abs/abs_dif.bit
代码及报告/design1/ise/abs/abs_dif.bld
代码及报告/design1/ise/abs/abs_dif.cmd_log
代码及报告/design1/ise/abs/abs_dif.drc
代码及报告/design1/ise/abs/abs_dif.lfp
代码及报告/design1/ise/abs/abs_dif.lso
代码及报告/design1/ise/abs/abs_dif.ncd
代码及报告/design1/ise/abs/abs_dif.ngc
代码及报告/design1/ise/abs/abs_dif.ngd
代码及报告/design1/ise/abs/abs_dif.ngr
代码及报告/design1/ise/abs/abs_dif.pad
代码及报告/design1/ise/abs/abs_dif.par
代码及报告/design1/ise/abs/abs_dif.pcf
代码及报告/design1/ise/abs/abs_dif.prj
代码及报告/design1/ise/abs/abs_dif.stx
代码及报告/design1/ise/abs/abs_dif.syr
代码及报告/design1/ise/abs/abs_dif.twr
代码及报告/design1/ise/abs/abs_dif.twx
代码及报告/design1/ise/abs/abs_dif.ucf
代码及报告/design1/ise/abs/abs_dif.unroutes
代码及报告/design1/ise/abs/abs_dif.ut
代码及报告/design1/ise/abs/abs_dif.v
代码及报告/design1/ise/abs/abs_dif.xpi
代码及报告/design1/ise/abs/abs_dif.xst
代码及报告/design1/ise/abs/abs_dif_guide.ncd
代码及报告/design1/ise/abs/abs_dif_map.map
代码及报告/design1/ise/abs/abs_dif_map.mrp
代码及报告/design1/ise/abs/abs_dif_map.ncd
代码及报告/design1/ise/abs/abs_dif_map.ngm
代码及报告/design1/ise/abs/abs_dif_pad.csv
代码及报告/design1/ise/abs/abs_dif_pad.txt
代码及报告/design1/ise/abs/abs_dif_prev_built.ngd
代码及报告/design1/ise/abs/abs_dif_summary.html
代码及报告/design1/ise/abs/abs_dif_summary.xml
代码及报告/design1/ise/abs/abs_dif_tb.fdo
代码及报告/design1/ise/abs/abs_dif_tb.udo
代码及报告/design1/ise/abs/abs_dif_tb.v
代码及报告/design1/ise/abs/abs_dif_usage.xml
代码及报告/design1/ise/abs/comp.v
代码及报告/design1/ise/abs/comp_tb.v
代码及报告/design1/ise/abs/full_adder.v
代码及报告/design1/ise/abs/full_adder_tb.v
代码及报告/design1/ise/abs/mux_2to1.v
代码及报告/design1/ise/abs/mux_2to1_tb.v
代码及报告/design1/ise/abs/transcript
代码及报告/design1/ise/abs/vsim.wlf
代码及报告/design1/ise/abs/work/
代码及报告/design1/ise/abs/work/abs_dif/
代码及报告/design1/ise/abs/work/abs_dif/verilog.asm
代码及报告/design1/ise/abs/work/abs_dif/_primary.dat
代码及报告/design1/ise/abs/work/abs_dif/_primary.vhd
代码及报告/design1/ise/abs/work/abs_dif_tb/
代码及报告/design1/ise/abs/work/abs_dif_tb/verilog.asm
代码及报告/design1/ise/abs/work/abs_dif_tb/_primary.dat
代码及报告/design1/ise/abs/work/abs_dif_tb/_primary.vhd
代码及报告/design1/ise/abs/work/comp/
代码及报告/design1/ise/abs/work/comp/verilog.asm
代码及报告/design1/ise/abs/work/comp/_primary.dat
代码及报告/design1/ise/abs/work/comp/_primary.vhd
代码及报告/design1/ise/abs/work/full_adder/
代码及报告/design1/ise/abs/work/full_adder/verilog.asm
代码及报告/design1/ise/abs/work/full_adder/_primary.dat
代码及报告/design1/ise/abs/work/full_adder/_primary.vhd
代码及报告/design1/ise/abs/work/glbl/
代码及报告/design1/ise/abs/work/glbl/verilog.asm
代码及报告/design1/ise/abs/work/glbl/_primary.dat
代码及报告/design1/ise/abs/work/glbl/_primary.vhd
代码及报告/design1/ise/abs/work/mux_2to1/
代码及报告/design1/ise/abs/work/mux_2to1/verilog.asm
代码及报告/design1/ise/abs/work/mux_2to1/_primary.dat
代码及报告/design1/ise/abs/work/mux_2to1/_primary.vhd
代码及报告/design1/ise/abs/work/_info
代码及报告/design1/ise/abs/xst/
代码及报告/design1/ise/abs/xst/dump.xst/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/notopt/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ngx/opt/
代码及报告/design1/ise/abs/xst/dump.xst/abs_dif.prj/ntrc.scr
代码及报告/design1/ise/abs/xst/projnav.tmp/
代码及报告/design1/ise/abs/xst/work/
代码及报告/design1/ise/abs/xst/work/hdllib.ref
代码及报告/design1/ise/abs/xst/work/vlg10/
代码及报告/design1/ise/abs/xst/work/vlg10/abs__dif.bin
代码及报告/design1/ise/abs/xst/work/vlg27/
代码及报告/design1/ise/abs/xst/work/vlg27/mux__2to1.bin
代码及报告/design1/ise/abs/xst/work/vlg3F/
代码及报告/design1/ise/abs/xst/work/vlg3F/comp.bin
代码及报告/design1/ise/abs/xst/work/vlg5A/
代码及报告/design1/ise/abs/xst/work/vlg5A/full__adder.bin
代码及报告/design1/ise/abs/_impact.cmd
代码及报告/design1/ise/abs/_impact.log
代码及报告/design1/ise/abs/_ngo/
代码及报告/design1/ise/abs/_ngo/netlist.lst
代码及报告/design1/ise/abs/_xmsgs/
代码及报告/design1/ise/abs/_xmsgs/bitgen.xmsgs
代码及报告/design1/ise/abs/_xmsgs/map.xmsgs
代码及报告/design1/ise/abs/_xmsgs/ngdbuild.xmsgs
代码及报告/design1/ise/abs/_xmsgs/par.xmsgs
代码及报告/design1/ise/abs/_xmsgs/trce.xmsgs
代码及报告/design1/ise/abs/_xmsgs/xst.xmsgs
代码及报告/design1/sim/
代码及报告/design1/sim/abs.cr.mti
代码及报告/design1/sim/abs.mpf
代码及报告/design1/sim/vsim.wlf
代码及报告/design1/sim/work/
代码及报告/design1/sim/work/@_opt/
代码及报告/design1/sim/work/@_opt1/
代码及报告/design1/sim/work/@_opt1/vopt1a9m7j
代码及报告/design1/sim/work/@_opt1/vopt4a3iqh
代码及报告/design1/sim/work/@_opt1/vopt87ve86
代码及报告/design1/sim/work/@_opt1/vopti0a2bn
代码及报告/design1/sim/work/@_opt1/voptt0mvan
代码及报告/design1/sim/work/@_opt1/voptx9frqk
代码及报告/design1/sim/work/@_opt1/_deps
代码及报告/design1/sim/work/@_opt2/
代码及报告/design1/sim/work/@_opt2/vopt1xd0iw
代码及报告/design1/sim/work/@_opt2/vopt1zyx11
代码及报告/design1/sim/work/@_opt2/vopt56et43
代码及报告/design1/sim/work/@_opt2/vopt5x7w1v
代码及报告/design1/sim/work/@_opt2/vopt868qk1
代码及报告/design1/sim/work/@_opt2/vopt8bek3z
代码及报告/design1/sim/work/@_opt2/voptb7ehzg
代码及报告/design1/si
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