文件名称:irda
-
所属分类:
- 标签属性:
- 上传时间:2013-01-06
-
文件大小:585.57kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
IRDA code Verilog code-IRDA code
(系统自动生成,下载前可以参看下载内容)
下载文件列表
irda/tags/First/.keepme
irda/tags/First/bench/.keepme
irda/tags/First/bench/verilog/.keepme
irda/tags/First/bench/verilog/crc_ccitt16_test.v
irda/tags/First/bench/verilog/crc_test.v
irda/tags/First/bench/verilog/irda_test.v
irda/tags/First/bench/vhdl/.keepme
irda/tags/First/doc/.keepme
irda/tags/First/doc/IrDA_spec.pdf
irda/tags/First/doc/src/.keepme
irda/tags/First/fv/.keepme
irda/tags/First/lint/.keepme
irda/tags/First/lint/bin/.keepme
irda/tags/First/lint/log/.keepme
irda/tags/First/lint/out/.keepme
irda/tags/First/lint/run/.keepme
irda/tags/First/rtl/.keepme
irda/tags/First/rtl/verilog/.keepme
irda/tags/First/rtl/verilog/irda_crc32.v
irda/tags/First/rtl/verilog/irda_crc32_rx.v
irda/tags/First/rtl/verilog/irda_crc_ccitt16.v
irda/tags/First/rtl/verilog/irda_crc_rx_ccitt16.v
irda/tags/First/rtl/verilog/irda_data_ctrl.v
irda/tags/First/rtl/verilog/irda_defines.v
irda/tags/First/rtl/verilog/irda_fast_enable_gen.v
irda/tags/First/rtl/verilog/irda_fifo.v
irda/tags/First/rtl/verilog/irda_fir_4ppm_decoder.v
irda/tags/First/rtl/verilog/irda_fir_4ppm_encoder.v
irda/tags/First/rtl/verilog/irda_fir_bit_sync.v
irda/tags/First/rtl/verilog/irda_fir_flag_det.v
irda/tags/First/rtl/verilog/irda_fir_flag_gen.v
irda/tags/First/rtl/verilog/irda_fir_rx.v
irda/tags/First/rtl/verilog/irda_fir_tx.v
irda/tags/First/rtl/verilog/irda_interrupts.v
irda/tags/First/rtl/verilog/irda_master_register.v
irda/tags/First/rtl/verilog/irda_mir_bit_destuffer.v
irda/tags/First/rtl/verilog/irda_mir_bit_stuffer.v
irda/tags/First/rtl/verilog/irda_mir_break_det.v
irda/tags/First/rtl/verilog/irda_mir_data_ctrl.v
irda/tags/First/rtl/verilog/irda_mir_decoder.v
irda/tags/First/rtl/verilog/irda_mir_encoder.v
irda/tags/First/rtl/verilog/irda_mir_rx.v
irda/tags/First/rtl/verilog/irda_mir_st_det.v
irda/tags/First/rtl/verilog/irda_mir_st_gen.v
irda/tags/First/rtl/verilog/irda_mir_tx.v
irda/tags/First/rtl/verilog/irda_out_mux.v
irda/tags/First/rtl/verilog/irda_reg.v
irda/tags/First/rtl/verilog/irda_sip_gen.v
irda/tags/First/rtl/verilog/irda_sir_decoder.v
irda/tags/First/rtl/verilog/irda_sir_encoder.v
irda/tags/First/rtl/verilog/irda_top.v
irda/tags/First/rtl/verilog/irda_wb.v
irda/tags/First/rtl/verilog/irda_wb_router.v
irda/tags/First/rtl/verilog/timescale.v
irda/tags/First/rtl/vhdl/.keepme
irda/tags/First/sim/.keepme
irda/tags/First/sim/gate_sim/.keepme
irda/tags/First/sim/gate_sim/bin/.keepme
irda/tags/First/sim/gate_sim/log/.keepme
irda/tags/First/sim/gate_sim/out/.keepme
irda/tags/First/sim/gate_sim/run/.keepme
irda/tags/First/sim/gate_sim/src/.keepme
irda/tags/First/sim/rtl_sim/.keepme
irda/tags/First/sim/rtl_sim/bin/.keepme
irda/tags/First/sim/rtl_sim/bin/nc.scr
irda/tags/First/sim/rtl_sim/bin/sim.tcl
irda/tags/First/sim/rtl_sim/log/.keepme
irda/tags/First/sim/rtl_sim/out/.keepme
irda/tags/First/sim/rtl_sim/run/.keepme
irda/tags/First/sim/rtl_sim/run/run_signalscan
irda/tags/First/sim/rtl_sim/run/run_sim
irda/tags/First/sim/rtl_sim/src/.keepme
irda/tags/First/syn/.keepme
irda/tags/First/syn/bin/.keepme
irda/tags/First/syn/log/.keepme
irda/tags/First/syn/out/.keepme
irda/tags/First/syn/run/.keepme
irda/tags/First/syn/src/.keepme
irda/trunk/.keepme
irda/trunk/bench/.keepme
irda/trunk/bench/verilog/.keepme
irda/trunk/bench/verilog/crc_ccitt16_test.v
irda/trunk/bench/verilog/crc_test.v
irda/trunk/bench/verilog/irda_sir_test.v
irda/trunk/bench/verilog/irda_test.v
irda/trunk/bench/vhdl/.keepme
irda/trunk/doc/.keepme
irda/trunk/doc/IrDA_spec.pdf
irda/trunk/doc/README
irda/trunk/doc/src/.keepme
irda/trunk/doc/src/IrDA_spec.doc
irda/trunk/fv/.keepme
irda/trunk/lint/.keepme
irda/trunk/lint/bin/.keepme
irda/trunk/lint/log/.keepme
irda/trunk/lint/out/.keepme
irda/trunk/lint/run/.keepme
irda/trunk/rtl/.keepme
irda/trunk/rtl/verilog/.keepme
irda/trunk/rtl/verilog/irda_crc32.v
irda/trunk/rtl/verilog/irda_crc32_rx.v
irda/trunk/rtl/verilog/irda_crc_ccitt16.v
irda/trunk/rtl/verilog/irda_crc_rx_ccitt16.v
irda/trunk/rtl/verilog/irda_data_ctrl.v
irda/trunk/rtl/verilog/irda_defines.v
irda/trunk/rtl/verilog/irda_fast_enable_gen.v
irda/trunk/rtl/verilog/irda_fast_mode_router.v
irda/trunk/rtl/verilog/irda_fifo.v
irda/trunk/rtl/verilog/irda_fir_4ppm_decoder.v
irda/trunk/rtl/verilog/irda_fir_4ppm_encoder.v
irda/trunk/rtl/verilog/irda_fir_bit_sync.v
irda/trunk/rtl/verilog/irda_fir_flag_det.v
irda/trunk/rtl/verilog/irda_fir_flag_gen.v
irda/trunk/rtl/verilog/irda_fir_rx.v
irda/trunk/rtl/verilog/irda_fir_tx.v
irda/trunk/rtl/verilog/irda_interrupts.v
irda/trunk/rtl/verilog/irda_master_register.v
irda/trunk/rtl/verilog/irda_mir_bit_destuffer.v
irda/trunk/rtl/verilog/irda_mir_bit_stuffer.v
irda/trunk/rtl/verilog/irda_mir_break_det.v
irda/trunk/rtl/verilog/irda_mir_decoder.v
irda/trunk/rtl/verilog/irda_mir_encoder.v
irda/trunk/rtl/verilog/irda_mir_rx.v
irda/trunk/rtl/verilog/irda_mir_st_det.v
irda/trunk/rtl/verilog/irda_mir_st_gen.v
irda/trunk/rtl/verilog/irda_mir_tx.v
irda/trunk/rtl/verilog/irda_out_mux.v
irda/trunk/rtl/verilog/irda_reg.v
irda/trunk/rtl/verilog/irda_sip_gen.v
irda/trunk/rtl/verilog/irda_sir_decoder.v
irda/trunk/rtl/verilog/irda_sir_encoder.v
irda/trunk/rtl/verilog/irda_top.v
irda/trunk
irda/tags/First/bench/.keepme
irda/tags/First/bench/verilog/.keepme
irda/tags/First/bench/verilog/crc_ccitt16_test.v
irda/tags/First/bench/verilog/crc_test.v
irda/tags/First/bench/verilog/irda_test.v
irda/tags/First/bench/vhdl/.keepme
irda/tags/First/doc/.keepme
irda/tags/First/doc/IrDA_spec.pdf
irda/tags/First/doc/src/.keepme
irda/tags/First/fv/.keepme
irda/tags/First/lint/.keepme
irda/tags/First/lint/bin/.keepme
irda/tags/First/lint/log/.keepme
irda/tags/First/lint/out/.keepme
irda/tags/First/lint/run/.keepme
irda/tags/First/rtl/.keepme
irda/tags/First/rtl/verilog/.keepme
irda/tags/First/rtl/verilog/irda_crc32.v
irda/tags/First/rtl/verilog/irda_crc32_rx.v
irda/tags/First/rtl/verilog/irda_crc_ccitt16.v
irda/tags/First/rtl/verilog/irda_crc_rx_ccitt16.v
irda/tags/First/rtl/verilog/irda_data_ctrl.v
irda/tags/First/rtl/verilog/irda_defines.v
irda/tags/First/rtl/verilog/irda_fast_enable_gen.v
irda/tags/First/rtl/verilog/irda_fifo.v
irda/tags/First/rtl/verilog/irda_fir_4ppm_decoder.v
irda/tags/First/rtl/verilog/irda_fir_4ppm_encoder.v
irda/tags/First/rtl/verilog/irda_fir_bit_sync.v
irda/tags/First/rtl/verilog/irda_fir_flag_det.v
irda/tags/First/rtl/verilog/irda_fir_flag_gen.v
irda/tags/First/rtl/verilog/irda_fir_rx.v
irda/tags/First/rtl/verilog/irda_fir_tx.v
irda/tags/First/rtl/verilog/irda_interrupts.v
irda/tags/First/rtl/verilog/irda_master_register.v
irda/tags/First/rtl/verilog/irda_mir_bit_destuffer.v
irda/tags/First/rtl/verilog/irda_mir_bit_stuffer.v
irda/tags/First/rtl/verilog/irda_mir_break_det.v
irda/tags/First/rtl/verilog/irda_mir_data_ctrl.v
irda/tags/First/rtl/verilog/irda_mir_decoder.v
irda/tags/First/rtl/verilog/irda_mir_encoder.v
irda/tags/First/rtl/verilog/irda_mir_rx.v
irda/tags/First/rtl/verilog/irda_mir_st_det.v
irda/tags/First/rtl/verilog/irda_mir_st_gen.v
irda/tags/First/rtl/verilog/irda_mir_tx.v
irda/tags/First/rtl/verilog/irda_out_mux.v
irda/tags/First/rtl/verilog/irda_reg.v
irda/tags/First/rtl/verilog/irda_sip_gen.v
irda/tags/First/rtl/verilog/irda_sir_decoder.v
irda/tags/First/rtl/verilog/irda_sir_encoder.v
irda/tags/First/rtl/verilog/irda_top.v
irda/tags/First/rtl/verilog/irda_wb.v
irda/tags/First/rtl/verilog/irda_wb_router.v
irda/tags/First/rtl/verilog/timescale.v
irda/tags/First/rtl/vhdl/.keepme
irda/tags/First/sim/.keepme
irda/tags/First/sim/gate_sim/.keepme
irda/tags/First/sim/gate_sim/bin/.keepme
irda/tags/First/sim/gate_sim/log/.keepme
irda/tags/First/sim/gate_sim/out/.keepme
irda/tags/First/sim/gate_sim/run/.keepme
irda/tags/First/sim/gate_sim/src/.keepme
irda/tags/First/sim/rtl_sim/.keepme
irda/tags/First/sim/rtl_sim/bin/.keepme
irda/tags/First/sim/rtl_sim/bin/nc.scr
irda/tags/First/sim/rtl_sim/bin/sim.tcl
irda/tags/First/sim/rtl_sim/log/.keepme
irda/tags/First/sim/rtl_sim/out/.keepme
irda/tags/First/sim/rtl_sim/run/.keepme
irda/tags/First/sim/rtl_sim/run/run_signalscan
irda/tags/First/sim/rtl_sim/run/run_sim
irda/tags/First/sim/rtl_sim/src/.keepme
irda/tags/First/syn/.keepme
irda/tags/First/syn/bin/.keepme
irda/tags/First/syn/log/.keepme
irda/tags/First/syn/out/.keepme
irda/tags/First/syn/run/.keepme
irda/tags/First/syn/src/.keepme
irda/trunk/.keepme
irda/trunk/bench/.keepme
irda/trunk/bench/verilog/.keepme
irda/trunk/bench/verilog/crc_ccitt16_test.v
irda/trunk/bench/verilog/crc_test.v
irda/trunk/bench/verilog/irda_sir_test.v
irda/trunk/bench/verilog/irda_test.v
irda/trunk/bench/vhdl/.keepme
irda/trunk/doc/.keepme
irda/trunk/doc/IrDA_spec.pdf
irda/trunk/doc/README
irda/trunk/doc/src/.keepme
irda/trunk/doc/src/IrDA_spec.doc
irda/trunk/fv/.keepme
irda/trunk/lint/.keepme
irda/trunk/lint/bin/.keepme
irda/trunk/lint/log/.keepme
irda/trunk/lint/out/.keepme
irda/trunk/lint/run/.keepme
irda/trunk/rtl/.keepme
irda/trunk/rtl/verilog/.keepme
irda/trunk/rtl/verilog/irda_crc32.v
irda/trunk/rtl/verilog/irda_crc32_rx.v
irda/trunk/rtl/verilog/irda_crc_ccitt16.v
irda/trunk/rtl/verilog/irda_crc_rx_ccitt16.v
irda/trunk/rtl/verilog/irda_data_ctrl.v
irda/trunk/rtl/verilog/irda_defines.v
irda/trunk/rtl/verilog/irda_fast_enable_gen.v
irda/trunk/rtl/verilog/irda_fast_mode_router.v
irda/trunk/rtl/verilog/irda_fifo.v
irda/trunk/rtl/verilog/irda_fir_4ppm_decoder.v
irda/trunk/rtl/verilog/irda_fir_4ppm_encoder.v
irda/trunk/rtl/verilog/irda_fir_bit_sync.v
irda/trunk/rtl/verilog/irda_fir_flag_det.v
irda/trunk/rtl/verilog/irda_fir_flag_gen.v
irda/trunk/rtl/verilog/irda_fir_rx.v
irda/trunk/rtl/verilog/irda_fir_tx.v
irda/trunk/rtl/verilog/irda_interrupts.v
irda/trunk/rtl/verilog/irda_master_register.v
irda/trunk/rtl/verilog/irda_mir_bit_destuffer.v
irda/trunk/rtl/verilog/irda_mir_bit_stuffer.v
irda/trunk/rtl/verilog/irda_mir_break_det.v
irda/trunk/rtl/verilog/irda_mir_decoder.v
irda/trunk/rtl/verilog/irda_mir_encoder.v
irda/trunk/rtl/verilog/irda_mir_rx.v
irda/trunk/rtl/verilog/irda_mir_st_det.v
irda/trunk/rtl/verilog/irda_mir_st_gen.v
irda/trunk/rtl/verilog/irda_mir_tx.v
irda/trunk/rtl/verilog/irda_out_mux.v
irda/trunk/rtl/verilog/irda_reg.v
irda/trunk/rtl/verilog/irda_sip_gen.v
irda/trunk/rtl/verilog/irda_sir_decoder.v
irda/trunk/rtl/verilog/irda_sir_encoder.v
irda/trunk/rtl/verilog/irda_top.v
irda/trunk
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.