VErilog编写的PS2键盘读写源码

模块端口的列表：

clk,

reset,

ps2_clk,

ps2_data,

rx_extended,

rx_released,

rx_shift_key_on,

rx_scan_code,

rx_ascii,

rx_data_ready, // rx_read_o

rx_read, // rx_read_ack_i

tx_data,

tx_write,

tx_write_ack_o,

tx_error_no_keyboard_ack-PS2 keyboard source literacy module VErilog written list of ports: clk, reset, ps2_clk, ps2_data, rx_extended, rx_released, rx_shift_key_on, rx_scan_code, rx_ascii, rx_data_ready,// ​ ​ rx_read_o rx_read,// ​ ​ rx_read_ack_i tx_data, tx_write, tx_write_ack_o, tx_error_no_keyboard_ack