文件名称:video
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- 上传时间:2013-01-25
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文件大小:1.09mb
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关于视频消抖,采用VC编写,算法详细,请详查代码内容-video stabilization
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下载文件列表
vip_example_design_3c120_v110_qsys_revA/3c120_host_board_pins.tcl
vip_example_design_3c120_v110_qsys_revA/altpll0.vhd
vip_example_design_3c120_v110_qsys_revA/alt_vip_cvi.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_cvo.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_dil2.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_reset_recovery.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_vfb.sdc
vip_example_design_3c120_v110_qsys_revA/bitec_dvi_io_j8_pins.tcl
vip_example_design_3c120_v110_qsys_revA/bitec_quad_video_j9_pins.tcl
vip_example_design_3c120_v110_qsys_revA/clk_reset_pins.tcl
vip_example_design_3c120_v110_qsys_revA/ip/
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_hw.tcl
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_bit_ctrl.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_top.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_byte_ctrl.vhd
vip_example_design_3c120_v110_qsys_revA/software/
vip_example_design_3c120_v110_qsys_revA/software/source/
vip_example_design_3c120_v110_qsys_revA/software/source/alt_math.h
vip_example_design_3c120_v110_qsys_revA/software/source/Event_Queue.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/I2C_Component.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Inserter.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/HSMC_Dual_DVI.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Code.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clipper.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII_Coefficient_Set.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clocked_Video_Output.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/alt_math.cpp
vip_example_design_3c120_v110_qsys_revA/software/source/DeinterlacerII.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Frame_Buffer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/HSMC_Quad_Video.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Vipcore.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clocked_Video_Input.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Mixer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Gamma_Corrector.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/main.cpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII_Coefficient_Generator.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Extractor.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Float_Quantizer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Video_Standard.hpp
vip_example_design_3c120_v110_qsys_revA/system.qsys
vip_example_design_3c120_v110_qsys_revA/system.sopcinfo
vip_example_design_3c120_v110_qsys_revA/vip_control.elf
vip_example_design_3c120_v110_qsys_revA/vip_top_assignment_defaults.qdf
vip_example_design_3c120_v110_qsys_revA/vip_top.qpf
vip_example_design_3c120_v110_qsys_revA/vip_top.qsf
vip_example_design_3c120_v110_qsys_revA/vip_top.sdc
vip_example_design_3c120_v110_qsys_revA/vip_top.sof
vip_example_design_3c120_v110_qsys_revA/vip_top.v
vip_example_design_3c120_v110_qsys_revA/altpll0.vhd
vip_example_design_3c120_v110_qsys_revA/alt_vip_cvi.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_cvo.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_dil2.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_reset_recovery.sdc
vip_example_design_3c120_v110_qsys_revA/alt_vip_vfb.sdc
vip_example_design_3c120_v110_qsys_revA/bitec_dvi_io_j8_pins.tcl
vip_example_design_3c120_v110_qsys_revA/bitec_quad_video_j9_pins.tcl
vip_example_design_3c120_v110_qsys_revA/clk_reset_pins.tcl
vip_example_design_3c120_v110_qsys_revA/ip/
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_hw.tcl
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_bit_ctrl.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_top.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master.vhd
vip_example_design_3c120_v110_qsys_revA/ip/altera_avalon_i2c/oc_i2c_master_byte_ctrl.vhd
vip_example_design_3c120_v110_qsys_revA/software/
vip_example_design_3c120_v110_qsys_revA/software/source/
vip_example_design_3c120_v110_qsys_revA/software/source/alt_math.h
vip_example_design_3c120_v110_qsys_revA/software/source/Event_Queue.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/I2C_Component.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Inserter.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/HSMC_Dual_DVI.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Code.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clipper.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII_Coefficient_Set.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clocked_Video_Output.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/alt_math.cpp
vip_example_design_3c120_v110_qsys_revA/software/source/DeinterlacerII.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Frame_Buffer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/HSMC_Quad_Video.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Vipcore.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Clocked_Video_Input.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Mixer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Gamma_Corrector.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/main.cpp
vip_example_design_3c120_v110_qsys_revA/software/source/ScalerII_Coefficient_Generator.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/AFD_Extractor.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Float_Quantizer.hpp
vip_example_design_3c120_v110_qsys_revA/software/source/Video_Standard.hpp
vip_example_design_3c120_v110_qsys_revA/system.qsys
vip_example_design_3c120_v110_qsys_revA/system.sopcinfo
vip_example_design_3c120_v110_qsys_revA/vip_control.elf
vip_example_design_3c120_v110_qsys_revA/vip_top_assignment_defaults.qdf
vip_example_design_3c120_v110_qsys_revA/vip_top.qpf
vip_example_design_3c120_v110_qsys_revA/vip_top.qsf
vip_example_design_3c120_v110_qsys_revA/vip_top.sdc
vip_example_design_3c120_v110_qsys_revA/vip_top.sof
vip_example_design_3c120_v110_qsys_revA/vip_top.v
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