文件名称:sobel2
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- 上传时间:2013-03-02
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文件大小:348.45kb
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新的sobel算子的FPGA实现。使用verilog语言,并调试通过~-The sobel operator new FPGA implementation. Verilog language, and debugging through to
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下载文件列表
sobel2/addr_gen.v
sobel2/arbiter.v
sobel2/bmp_bin.exe
sobel2/bmp_dat.txt
sobel2/bmp_process.exe
sobel2/compute.v
sobel2/cpu.v
sobel2/machine.v
sobel2/memory.v
sobel2/modelsim.ini
sobel2/post_dat1.txt
sobel2/post_process_dat.txt
sobel2/read_bmp.exe
sobel2/sobel.bmp
sobel2/sobel.v
sobel2/sobel_rslt1.bmp
sobel2/sobel_slave.v
sobel2/testbench.v
sobel2/testdo.txt
sobel2/vsim.wlf
sobel2/work/@_opt/vopt0xbb1q
sobel2/work/@_opt/vopt1tew3i
sobel2/work/@_opt/vopt2qhd6d
sobel2/work/@_opt/vopt3h0aaz
sobel2/work/@_opt/vopt4e3vct
sobel2/work/@_opt/vopt5b6cfm
sobel2/work/@_opt/vopt65m8j7
sobel2/work/@_opt/vopt72rsm2
sobel2/work/@_opt/vopt8ztarx
sobel2/work/@_opt/vopt9s97wf
sobel2/work/@_opt/voptancrya
sobel2/work/@_opt/voptbgvk2x
sobel2/work/@_opt/voptbjf916
sobel2/work/@_opt/voptcdy55r
sobel2/work/@_opt/voptda1q7j
sobel2/work/@_opt/vopte4gjb5
sobel2/work/@_opt/vopte748ae
sobel2/work/@_opt/voptf1j4e0
sobel2/work/@_opt/voptgymmgv
sobel2/work/@_opt/vopthr4ikd
sobel2/work/@_opt/vopthvr6jn
sobel2/work/@_opt/voptim73q8
sobel2/work/@_opt/voptjiaks3
sobel2/work/@_opt/voptkcsgxm
sobel2/work/@_opt/voptkfd5wy
sobel2/work/@_opt/voptm9w10h
sobel2/work/@_opt/voptn6zi2c
sobel2/work/@_opt/voptq0ef6y
sobel2/work/@_opt/voptq32457
sobel2/work/@_opt/voptrxg09s
sobel2/work/@_opt/voptstjhbk
sobel2/work/@_opt/vopttk2ef6
sobel2/work/@_opt/vopttqn2ef
sobel2/work/@_opt/voptvh5zh1
sobel2/work/@_opt/voptwe8gkw
sobel2/work/@_opt/voptx8qcre
sobel2/work/@_opt/voptxbb1qq
sobel2/work/@_opt/vopty5txt9
sobel2/work/@_opt/voptz2xex4
sobel2/work/@_opt/_deps
sobel2/work/addr_gen/verilog.asm
sobel2/work/addr_gen/verilog.rw
sobel2/work/addr_gen/_primary.dat
sobel2/work/addr_gen/_primary.dbs
sobel2/work/addr_gen/_primary.vhd
sobel2/work/arbiter/verilog.asm
sobel2/work/arbiter/verilog.rw
sobel2/work/arbiter/_primary.dat
sobel2/work/arbiter/_primary.dbs
sobel2/work/arbiter/_primary.vhd
sobel2/work/compute/verilog.asm
sobel2/work/compute/verilog.rw
sobel2/work/compute/_primary.dat
sobel2/work/compute/_primary.dbs
sobel2/work/compute/_primary.vhd
sobel2/work/cpu/verilog.asm
sobel2/work/cpu/verilog.rw
sobel2/work/cpu/_primary.dat
sobel2/work/cpu/_primary.dbs
sobel2/work/cpu/_primary.vhd
sobel2/work/machine/verilog.asm
sobel2/work/machine/verilog.rw
sobel2/work/machine/_primary.dat
sobel2/work/machine/_primary.dbs
sobel2/work/machine/_primary.vhd
sobel2/work/memory/verilog.asm
sobel2/work/memory/verilog.rw
sobel2/work/memory/_primary.dat
sobel2/work/memory/_primary.dbs
sobel2/work/memory/_primary.vhd
sobel2/work/sobel/verilog.asm
sobel2/work/sobel/verilog.rw
sobel2/work/sobel/_primary.dat
sobel2/work/sobel/_primary.dbs
sobel2/work/sobel/_primary.vhd
sobel2/work/sobel_slave/verilog.asm
sobel2/work/sobel_slave/verilog.rw
sobel2/work/sobel_slave/_primary.dat
sobel2/work/sobel_slave/_primary.dbs
sobel2/work/sobel_slave/_primary.vhd
sobel2/work/testbench/verilog.asm
sobel2/work/testbench/verilog.rw
sobel2/work/testbench/_primary.dat
sobel2/work/testbench/_primary.dbs
sobel2/work/testbench/_primary.vhd
sobel2/work/_info
sobel2/work/_vmake
sobel2/work/@_opt
sobel2/work/addr_gen
sobel2/work/arbiter
sobel2/work/compute
sobel2/work/cpu
sobel2/work/machine
sobel2/work/memory
sobel2/work/sobel
sobel2/work/sobel_slave
sobel2/work/testbench
sobel2/work/_temp
sobel2/work
sobel2
sobel2/arbiter.v
sobel2/bmp_bin.exe
sobel2/bmp_dat.txt
sobel2/bmp_process.exe
sobel2/compute.v
sobel2/cpu.v
sobel2/machine.v
sobel2/memory.v
sobel2/modelsim.ini
sobel2/post_dat1.txt
sobel2/post_process_dat.txt
sobel2/read_bmp.exe
sobel2/sobel.bmp
sobel2/sobel.v
sobel2/sobel_rslt1.bmp
sobel2/sobel_slave.v
sobel2/testbench.v
sobel2/testdo.txt
sobel2/vsim.wlf
sobel2/work/@_opt/vopt0xbb1q
sobel2/work/@_opt/vopt1tew3i
sobel2/work/@_opt/vopt2qhd6d
sobel2/work/@_opt/vopt3h0aaz
sobel2/work/@_opt/vopt4e3vct
sobel2/work/@_opt/vopt5b6cfm
sobel2/work/@_opt/vopt65m8j7
sobel2/work/@_opt/vopt72rsm2
sobel2/work/@_opt/vopt8ztarx
sobel2/work/@_opt/vopt9s97wf
sobel2/work/@_opt/voptancrya
sobel2/work/@_opt/voptbgvk2x
sobel2/work/@_opt/voptbjf916
sobel2/work/@_opt/voptcdy55r
sobel2/work/@_opt/voptda1q7j
sobel2/work/@_opt/vopte4gjb5
sobel2/work/@_opt/vopte748ae
sobel2/work/@_opt/voptf1j4e0
sobel2/work/@_opt/voptgymmgv
sobel2/work/@_opt/vopthr4ikd
sobel2/work/@_opt/vopthvr6jn
sobel2/work/@_opt/voptim73q8
sobel2/work/@_opt/voptjiaks3
sobel2/work/@_opt/voptkcsgxm
sobel2/work/@_opt/voptkfd5wy
sobel2/work/@_opt/voptm9w10h
sobel2/work/@_opt/voptn6zi2c
sobel2/work/@_opt/voptq0ef6y
sobel2/work/@_opt/voptq32457
sobel2/work/@_opt/voptrxg09s
sobel2/work/@_opt/voptstjhbk
sobel2/work/@_opt/vopttk2ef6
sobel2/work/@_opt/vopttqn2ef
sobel2/work/@_opt/voptvh5zh1
sobel2/work/@_opt/voptwe8gkw
sobel2/work/@_opt/voptx8qcre
sobel2/work/@_opt/voptxbb1qq
sobel2/work/@_opt/vopty5txt9
sobel2/work/@_opt/voptz2xex4
sobel2/work/@_opt/_deps
sobel2/work/addr_gen/verilog.asm
sobel2/work/addr_gen/verilog.rw
sobel2/work/addr_gen/_primary.dat
sobel2/work/addr_gen/_primary.dbs
sobel2/work/addr_gen/_primary.vhd
sobel2/work/arbiter/verilog.asm
sobel2/work/arbiter/verilog.rw
sobel2/work/arbiter/_primary.dat
sobel2/work/arbiter/_primary.dbs
sobel2/work/arbiter/_primary.vhd
sobel2/work/compute/verilog.asm
sobel2/work/compute/verilog.rw
sobel2/work/compute/_primary.dat
sobel2/work/compute/_primary.dbs
sobel2/work/compute/_primary.vhd
sobel2/work/cpu/verilog.asm
sobel2/work/cpu/verilog.rw
sobel2/work/cpu/_primary.dat
sobel2/work/cpu/_primary.dbs
sobel2/work/cpu/_primary.vhd
sobel2/work/machine/verilog.asm
sobel2/work/machine/verilog.rw
sobel2/work/machine/_primary.dat
sobel2/work/machine/_primary.dbs
sobel2/work/machine/_primary.vhd
sobel2/work/memory/verilog.asm
sobel2/work/memory/verilog.rw
sobel2/work/memory/_primary.dat
sobel2/work/memory/_primary.dbs
sobel2/work/memory/_primary.vhd
sobel2/work/sobel/verilog.asm
sobel2/work/sobel/verilog.rw
sobel2/work/sobel/_primary.dat
sobel2/work/sobel/_primary.dbs
sobel2/work/sobel/_primary.vhd
sobel2/work/sobel_slave/verilog.asm
sobel2/work/sobel_slave/verilog.rw
sobel2/work/sobel_slave/_primary.dat
sobel2/work/sobel_slave/_primary.dbs
sobel2/work/sobel_slave/_primary.vhd
sobel2/work/testbench/verilog.asm
sobel2/work/testbench/verilog.rw
sobel2/work/testbench/_primary.dat
sobel2/work/testbench/_primary.dbs
sobel2/work/testbench/_primary.vhd
sobel2/work/_info
sobel2/work/_vmake
sobel2/work/@_opt
sobel2/work/addr_gen
sobel2/work/arbiter
sobel2/work/compute
sobel2/work/cpu
sobel2/work/machine
sobel2/work/memory
sobel2/work/sobel
sobel2/work/sobel_slave
sobel2/work/testbench
sobel2/work/_temp
sobel2/work
sobel2
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