文件名称:ourdev_572220
-
所属分类:
- 标签属性:
- 上传时间:2013-03-14
-
文件大小:16.91mb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
利用FPGA和avr用TFT显示的代码 魏坤的
(系统自动生成,下载前可以参看下载内容)
下载文件列表
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/.sopc_builder/install.ptf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/.sopc_builder/install2.ptf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/.sopc_builder/preferences.xml
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/AC_DC1.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/AC_DC2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/adc_clk_module.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/adc_clk_module.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.inc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.ppf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.qip
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0_wave0.jpg
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0_waveforms.html
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.inc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.ppf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.qip
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1_wave0.jpg
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1_waveforms.html
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/ATT1.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/ATT2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/Block1.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/Block4.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.ocp
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.sdc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_bht_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_dc_tag_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_ic_tag_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_sysclk.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_tck.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_wrapper.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_mult_cell.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_ociram_default_contents.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram_a.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram_b.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_test_bench.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_sel.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_sel.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/add_sub_1ph.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_29f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_7ve1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_9tl1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_9vc1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_bm61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_bve1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_c9d1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_e502.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_ig22.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_j9f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_lo31.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_nse1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_p2f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_pkf1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_q2f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_qed1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_ro61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_stf1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_t072.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_u0g1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_vo61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_0e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_1e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_2e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_rdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_sdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_tdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_udb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_vd8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_dpfifo_8t21.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_fefifo_7cf.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_egc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_fgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_ggc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_hgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_igc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_jgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_o96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_p96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_r96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_00j.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_1mg.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_3mg.tdf
FPGA工程包/HANDHELD_D
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/.sopc_builder/install2.ptf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/.sopc_builder/preferences.xml
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/AC_DC1.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/AC_DC2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/adc_clk_module.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/adc_clk_module.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.inc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.ppf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.qip
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0_wave0.jpg
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll0_waveforms.html
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.inc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.ppf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.qip
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1_wave0.jpg
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/altpll1_waveforms.html
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/ATT1.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/ATT2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/Block1.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/Block4.bdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/clk_div.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.ocp
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.sdc
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_bht_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_dc_tag_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_ic_tag_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_sysclk.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_tck.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_jtag_debug_module_wrapper.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_mult_cell.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_ociram_default_contents.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram_a.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_rf_ram_b.mif
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cpu_test_bench.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/cut_off.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.bsf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_mux_2.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_sel.v
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/data_sel.v.bak
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/add_sub_1ph.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_29f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_7ve1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_9tl1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_9vc1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_bm61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_bve1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_c9d1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_e502.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_ig22.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_j9f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_lo31.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_nse1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_p2f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_pkf1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_q2f1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_qed1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_ro61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_stf1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_t072.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_u0g1.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/altsyncram_vo61.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_0e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_1e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_2e8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_rdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_sdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_tdb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_udb.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/alt_synch_pipe_vd8.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_dpfifo_8t21.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_fefifo_7cf.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_egc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_fgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_ggc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_hgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_igc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_jgc.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_o96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_p96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/a_graycounter_r96.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_00j.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_1mg.tdf
FPGA工程包/HANDHELD_DSO_PROJECT_V2.0/db/cmpr_3mg.tdf
FPGA工程包/HANDHELD_D
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.