文件名称:1_burst_sdram
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- 上传时间:2013-03-16
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文件大小:11.33mb
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已下载:0次
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相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
sdram的单个存储单元的读写,个人编写,很容易理解,对初学者很有效哦-reading and writing of of sdram individual storage unit, personal writing, it is easy to understand, very effective oh for beginners
(系统自动生成,下载前可以参看下载内容)
下载文件列表
1_burst_sdram/project/sdram/123.wcfg
1_burst_sdram/project/sdram/current_webtalk_impact.xml
1_burst_sdram/project/sdram/fuse.log
1_burst_sdram/project/sdram/fuse.xmsgs
1_burst_sdram/project/sdram/fuseRelaunch.cmd
1_burst_sdram/project/sdram/impact.xsl
1_burst_sdram/project/sdram/impact_impact.xwbt
1_burst_sdram/project/sdram/import_ise_summary.txt
1_burst_sdram/project/sdram/ipcore_dir/coregen.cgc
1_burst_sdram/project/sdram/ipcore_dir/coregen.cgp
1_burst_sdram/project/sdram/ipcore_dir/coregen.log
1_burst_sdram/project/sdram/ipcore_dir/create_fifo.tcl
1_burst_sdram/project/sdram/ipcore_dir/create_sdr.tcl
1_burst_sdram/project/sdram/ipcore_dir/create_sdram.tcl
1_burst_sdram/project/sdram/ipcore_dir/edit_sdr.tcl
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/768c.pdf
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/adr_cntrl_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/read_data_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/ug086.pdf
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/write_data_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/xapp454_sp3.url
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/datasheet.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/log.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/mig.prj
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/create_ise.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/icon_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ila_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ise_flow.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ise_run.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/makeproj.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/mem_interface_top.ut
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/readme.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/rem_files.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/sdr.ucf
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/set_ise_prop.tcl
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/vio_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_addr_gen_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cal_ctl.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cal_top.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_clk_dcm.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cmd_fsm_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cmp_data_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_controller_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_controller_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_gen_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_path_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_path_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_read_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_read_controller_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_write_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_dqs_delay_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_fifo_0_wr_en_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_fifo_1_wr_en_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure_top.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_main_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_parameters_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_ram8d_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_rd_gray_cntr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dm_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dqs_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dq_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_tap_dly.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_test_bench_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_top_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_wr_gray_cntr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/ddr_model.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/ddr_model_parameters.vh
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/sim.do
1_burst_sdram/project
1_burst_sdram/project/sdram/current_webtalk_impact.xml
1_burst_sdram/project/sdram/fuse.log
1_burst_sdram/project/sdram/fuse.xmsgs
1_burst_sdram/project/sdram/fuseRelaunch.cmd
1_burst_sdram/project/sdram/impact.xsl
1_burst_sdram/project/sdram/impact_impact.xwbt
1_burst_sdram/project/sdram/import_ise_summary.txt
1_burst_sdram/project/sdram/ipcore_dir/coregen.cgc
1_burst_sdram/project/sdram/ipcore_dir/coregen.cgp
1_burst_sdram/project/sdram/ipcore_dir/coregen.log
1_burst_sdram/project/sdram/ipcore_dir/create_fifo.tcl
1_burst_sdram/project/sdram/ipcore_dir/create_sdr.tcl
1_burst_sdram/project/sdram/ipcore_dir/create_sdram.tcl
1_burst_sdram/project/sdram/ipcore_dir/edit_sdr.tcl
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/768c.pdf
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/adr_cntrl_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/read_data_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/ug086.pdf
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/write_data_timing_0.xls
1_burst_sdram/project/sdram/ipcore_dir/sdr/docs/xapp454_sp3.url
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/datasheet.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/log.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/mig.prj
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/create_ise.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/icon_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ila_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ise_flow.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/ise_run.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/makeproj.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/mem_interface_top.ut
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/readme.txt
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/rem_files.bat
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/sdr.ucf
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/set_ise_prop.tcl
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/par/vio_coregen.xco
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_addr_gen_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cal_ctl.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cal_top.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_clk_dcm.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cmd_fsm_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_cmp_data_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_controller_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_controller_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_gen_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_path_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_path_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_read_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_read_controller_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_data_write_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_dqs_delay_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_fifo_0_wr_en_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_fifo_1_wr_en_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_infrastructure_top.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_iobs_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_main_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_parameters_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_ram8d_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_rd_gray_cntr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dm_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dqs_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_s3_dq_iob.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_tap_dly.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_test_bench_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_top_0.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/rtl/sdr_wr_gray_cntr.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/ddr_model.v
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/ddr_model_parameters.vh
1_burst_sdram/project/sdram/ipcore_dir/sdr/example_design/sim/sim.do
1_burst_sdram/project
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