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文件名称:ledflow

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  • 上传时间:
    2013-03-16
  • 文件大小:
    198.83kb
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介绍说明--下载内容来自于网络,使用问题请自行百度

led流水灯工程,方便大家好好的学习FPGA-led light water engineering, facilitate proper learning FPGA
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ledflow/
ledflow/db/
ledflow/db/ledflow.db_info
ledflow/db/ledflow.sld_design_entry.sci
ledflow/db/logic_util_heursitic.dat
ledflow/db/prev_cmp_ledflow.qmsg
ledflow/incremental_db/
ledflow/incremental_db/compiled_partitions/
ledflow/incremental_db/compiled_partitions/ledflow.db_info
ledflow/incremental_db/README
ledflow/ledflow.asm.rpt
ledflow/ledflow.bsf
ledflow/ledflow.done
ledflow/ledflow.eda.rpt
ledflow/ledflow.fit - 副本.smsg
ledflow/ledflow.fit.rpt
ledflow/ledflow.fit.smsg
ledflow/ledflow.fit.summary
ledflow/ledflow.flow.rpt
ledflow/ledflow.map.rpt
ledflow/ledflow.map.summary
ledflow/ledflow.out.sdc
ledflow/ledflow.pin
ledflow/ledflow.pof
ledflow/ledflow.pow.rpt
ledflow/ledflow.pow.summary
ledflow/ledflow.qpf
ledflow/ledflow.qsf
ledflow/ledflow.qws
ledflow/ledflow.sdc
ledflow/ledflow.sof
ledflow/ledflow.sta.rpt
ledflow/ledflow.sta.summary
ledflow/ledflow.v
ledflow/ledflow.v.bak
ledflow/ledflow_assignment_defaults.qdf
ledflow/ledflow_nativelink_simulation.rpt
ledflow/simulation/
ledflow/simulation/modelsim/
ledflow/simulation/modelsim/gate_work/
ledflow/simulation/modelsim/gate_work/ledflow/
ledflow/simulation/modelsim/gate_work/ledflow/verilog.prw
ledflow/simulation/modelsim/gate_work/ledflow/verilog.psm
ledflow/simulation/modelsim/gate_work/ledflow/_primary.dat
ledflow/simulation/modelsim/gate_work/ledflow/_primary.dbs
ledflow/simulation/modelsim/gate_work/ledflow/_primary.vhd
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/verilog.prw
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/verilog.psm
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/_primary.dat
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/_primary.dbs
ledflow/simulation/modelsim/gate_work/ledflow_vlg_tst/_primary.vhd
ledflow/simulation/modelsim/gate_work/_info
ledflow/simulation/modelsim/gate_work/_temp/
ledflow/simulation/modelsim/gate_work/_vmake
ledflow/simulation/modelsim/ledflow.cr.mti
ledflow/simulation/modelsim/ledflow.mpf
ledflow/simulation/modelsim/ledflow.sft
ledflow/simulation/modelsim/ledflow.vo
ledflow/simulation/modelsim/ledflow.vt
ledflow/simulation/modelsim/ledflow.vt.bak
ledflow/simulation/modelsim/ledflow_fast.vo
ledflow/simulation/modelsim/ledflow_modelsim.xrf
ledflow/simulation/modelsim/ledflow_run_msim_gate_verilog.do
ledflow/simulation/modelsim/ledflow_run_msim_rtl_verilog.do
ledflow/simulation/modelsim/ledflow_run_msim_rtl_verilog.do.bak
ledflow/simulation/modelsim/ledflow_v.sdo
ledflow/simulation/modelsim/ledflow_v.sdo_typ.csd
ledflow/simulation/modelsim/ledflow_v_fast.sdo
ledflow/simulation/modelsim/ledf_low.cr.mti
ledflow/simulation/modelsim/modelsim.ini
ledflow/simulation/modelsim/msim_transcript
ledflow/simulation/modelsim/rtl_work/
ledflow/simulation/modelsim/rtl_work/ledflow/
ledflow/simulation/modelsim/rtl_work/ledflow/verilog.prw
ledflow/simulation/modelsim/rtl_work/ledflow/verilog.psm
ledflow/simulation/modelsim/rtl_work/ledflow/_primary.dat
ledflow/simulation/modelsim/rtl_work/ledflow/_primary.dbs
ledflow/simulation/modelsim/rtl_work/ledflow/_primary.vhd
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/verilog.prw
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/verilog.psm
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/_primary.dat
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/_primary.dbs
ledflow/simulation/modelsim/rtl_work/ledflow_vlg_tst/_primary.vhd
ledflow/simulation/modelsim/rtl_work/_info
ledflow/simulation/modelsim/rtl_work/_temp/
ledflow/simulation/modelsim/rtl_work/_vmake
ledflow/simulation/modelsim/transcript
ledflow/simulation/modelsim/vsim.wlf
ledflow/simulation/modelsim/work/
ledflow/simulation/modelsim/work/ledflow/
ledflow/simulation/modelsim/work/ledflow/verilog.prw
ledflow/simulation/modelsim/work/ledflow/verilog.psm
ledflow/simulation/modelsim/work/ledflow/_primary.dat
ledflow/simulation/modelsim/work/ledflow/_primary.dbs
ledflow/simulation/modelsim/work/ledflow/_primary.vhd
ledflow/simulation/modelsim/work/ledflow_vlg_tst/
ledflow/simulation/modelsim/work/ledflow_vlg_tst/verilog.prw
ledflow/simulation/modelsim/work/ledflow_vlg_tst/verilog.psm
ledflow/simulation/modelsim/work/ledflow_vlg_tst/_primary.dat
ledflow/simulation/modelsim/work/ledflow_vlg_tst/_primary.dbs
ledflow/simulation/modelsim/work/ledflow_vlg_tst/_primary.vhd
ledflow/simulation/modelsim/work/_info
ledflow/simulation/modelsim/work/_temp/
ledflow/simulation/modelsim/work/_temp/vlogh09j47
ledflow/simulation/modelsim/work/_temp/vlogmmfe08
ledflow/simulation/modelsim/work/_temp/vlogzy8hz3
ledflow/simulation/modelsim/work/_temp/vlogzyyq2d
ledflow/simulation/modelsim/work/_vmake

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