文件名称:cache
-
所属分类:
- 标签属性:
- 上传时间:2013-03-20
-
文件大小:114.53kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
基于MIPS思维方式,verilog语言,简单的cache 控制器设计,状态机共分4个状态,同时内含多样测试文件-MIPS way of thinking, verilog language, simple cache controller state machine is divided into four states, at the same time contains diverse test file
(系统自动生成,下载前可以参看下载内容)
下载文件列表
cache/sim/cache1.cr.mti
cache/sim/cache1.mpf
cache/sim/vsim.wlf
cache/sim/work/@_opt/vopt0c90yx
cache/sim/work/@_opt/vopt0cax3x
cache/sim/work/@_opt/vopt70rs1i
cache/sim/work/@_opt/vopt7jqqnh
cache/sim/work/@_opt/voptas8hax
cache/sim/work/@_opt/voptb3dknh
cache/sim/work/@_opt/voptbgdn1i
cache/sim/work/@_opt/vopte9yeax
cache/sim/work/@_opt/voptei4g1h
cache/sim/work/@_opt/voptf03j1i
cache/sim/work/@_opt/vopti2td1h
cache/sim/work/@_opt/voptiftgch
cache/sim/work/@_opt/voptisjaax
cache/sim/work/@_opt/voptm097dx
cache/sim/work/@_opt/voptm9fa4h
cache/sim/work/@_opt/voptnzfcch
cache/sim/work/@_opt/vopts659fh
cache/sim/work/@_opt/vopts7y4gx
cache/sim/work/@_opt/voptsxy7rx
cache/sim/work/@_opt/voptwej1jx
cache/sim/work/@_opt/voptx4k3vx
cache/sim/work/@_opt/voptx4t6mh
cache/sim/work/@_opt/_deps
cache/sim/work/cache_controller/_primary.dat
cache/sim/work/cache_controller/_primary.dbs
cache/sim/work/cache_controller/_primary.vhd
cache/sim/work/cache_controller_00_tb/_primary.dat
cache/sim/work/cache_controller_00_tb/_primary.dbs
cache/sim/work/cache_controller_00_tb/_primary.vhd
cache/sim/work/cache_controller_hit12_tb/_primary.dat
cache/sim/work/cache_controller_hit12_tb/_primary.dbs
cache/sim/work/cache_controller_hit12_tb/_primary.vhd
cache/sim/work/cache_controller_miss1_tb/_primary.dat
cache/sim/work/cache_controller_miss1_tb/_primary.dbs
cache/sim/work/cache_controller_miss1_tb/_primary.vhd
cache/sim/work/cache_controller_miss2_tb/_primary.dat
cache/sim/work/cache_controller_miss2_tb/_primary.dbs
cache/sim/work/cache_controller_miss2_tb/_primary.vhd
cache/sim/work/cache_controller_tb/_primary.dat
cache/sim/work/cache_controller_tb/_primary.dbs
cache/sim/work/cache_controller_tb/_primary.vhd
cache/sim/work/counter_n/_primary.dat
cache/sim/work/counter_n/_primary.dbs
cache/sim/work/counter_n/_primary.vhd
cache/sim/work/counter_n2/_primary.dat
cache/sim/work/counter_n2/_primary.dbs
cache/sim/work/counter_n2/_primary.vhd
cache/sim/work/counter_n_tb_v/_primary.dat
cache/sim/work/counter_n_tb_v/_primary.dbs
cache/sim/work/counter_n_tb_v/_primary.vhd
cache/sim/work/_info
cache/sim/work/_temp/vlogz02b08
cache/sim/work/_temp/vlogzn3be7
cache/sim/work/_vmake
cache/src/cache_controller.v
cache/src/cache_controller_00000000.v.bak
cache/src/cache_controller_00_tb.v
cache/src/cache_controller_00_tb.v.bak
cache/src/cache_controller_hit12_tb.v
cache/src/cache_controller_hit12_tb.v.bak
cache/src/cache_controller_hit1_tb.v.bak
cache/src/cache_controller_miss1_tb.v
cache/src/cache_controller_miss1_tb.v.bak
cache/src/cache_controller_miss2_tb.v
cache/src/cache_controller_miss2_tb.v.bak
cache/src/cache_controller_tb.v
cache/src/cache_controller_tb.v.bak
cache/src/cache_controller_tb_2.v
cache/src/counter_n.v.bak
cache/src/counter_n2.v
cache/src/counter_n2.v.bak
cache/src/counter_n_tb.v
cache/src/counter_n_tb.v.bak
cache/sim/work/@_opt
cache/sim/work/cache_controller
cache/sim/work/cache_controller_00_tb
cache/sim/work/cache_controller_hit12_tb
cache/sim/work/cache_controller_miss1_tb
cache/sim/work/cache_controller_miss2_tb
cache/sim/work/cache_controller_tb
cache/sim/work/counter_n
cache/sim/work/counter_n2
cache/sim/work/counter_n_tb_v
cache/sim/work/_temp
cache/sim/work
cache/sim
cache/src
cache
cache/sim/cache1.mpf
cache/sim/vsim.wlf
cache/sim/work/@_opt/vopt0c90yx
cache/sim/work/@_opt/vopt0cax3x
cache/sim/work/@_opt/vopt70rs1i
cache/sim/work/@_opt/vopt7jqqnh
cache/sim/work/@_opt/voptas8hax
cache/sim/work/@_opt/voptb3dknh
cache/sim/work/@_opt/voptbgdn1i
cache/sim/work/@_opt/vopte9yeax
cache/sim/work/@_opt/voptei4g1h
cache/sim/work/@_opt/voptf03j1i
cache/sim/work/@_opt/vopti2td1h
cache/sim/work/@_opt/voptiftgch
cache/sim/work/@_opt/voptisjaax
cache/sim/work/@_opt/voptm097dx
cache/sim/work/@_opt/voptm9fa4h
cache/sim/work/@_opt/voptnzfcch
cache/sim/work/@_opt/vopts659fh
cache/sim/work/@_opt/vopts7y4gx
cache/sim/work/@_opt/voptsxy7rx
cache/sim/work/@_opt/voptwej1jx
cache/sim/work/@_opt/voptx4k3vx
cache/sim/work/@_opt/voptx4t6mh
cache/sim/work/@_opt/_deps
cache/sim/work/cache_controller/_primary.dat
cache/sim/work/cache_controller/_primary.dbs
cache/sim/work/cache_controller/_primary.vhd
cache/sim/work/cache_controller_00_tb/_primary.dat
cache/sim/work/cache_controller_00_tb/_primary.dbs
cache/sim/work/cache_controller_00_tb/_primary.vhd
cache/sim/work/cache_controller_hit12_tb/_primary.dat
cache/sim/work/cache_controller_hit12_tb/_primary.dbs
cache/sim/work/cache_controller_hit12_tb/_primary.vhd
cache/sim/work/cache_controller_miss1_tb/_primary.dat
cache/sim/work/cache_controller_miss1_tb/_primary.dbs
cache/sim/work/cache_controller_miss1_tb/_primary.vhd
cache/sim/work/cache_controller_miss2_tb/_primary.dat
cache/sim/work/cache_controller_miss2_tb/_primary.dbs
cache/sim/work/cache_controller_miss2_tb/_primary.vhd
cache/sim/work/cache_controller_tb/_primary.dat
cache/sim/work/cache_controller_tb/_primary.dbs
cache/sim/work/cache_controller_tb/_primary.vhd
cache/sim/work/counter_n/_primary.dat
cache/sim/work/counter_n/_primary.dbs
cache/sim/work/counter_n/_primary.vhd
cache/sim/work/counter_n2/_primary.dat
cache/sim/work/counter_n2/_primary.dbs
cache/sim/work/counter_n2/_primary.vhd
cache/sim/work/counter_n_tb_v/_primary.dat
cache/sim/work/counter_n_tb_v/_primary.dbs
cache/sim/work/counter_n_tb_v/_primary.vhd
cache/sim/work/_info
cache/sim/work/_temp/vlogz02b08
cache/sim/work/_temp/vlogzn3be7
cache/sim/work/_vmake
cache/src/cache_controller.v
cache/src/cache_controller_00000000.v.bak
cache/src/cache_controller_00_tb.v
cache/src/cache_controller_00_tb.v.bak
cache/src/cache_controller_hit12_tb.v
cache/src/cache_controller_hit12_tb.v.bak
cache/src/cache_controller_hit1_tb.v.bak
cache/src/cache_controller_miss1_tb.v
cache/src/cache_controller_miss1_tb.v.bak
cache/src/cache_controller_miss2_tb.v
cache/src/cache_controller_miss2_tb.v.bak
cache/src/cache_controller_tb.v
cache/src/cache_controller_tb.v.bak
cache/src/cache_controller_tb_2.v
cache/src/counter_n.v.bak
cache/src/counter_n2.v
cache/src/counter_n2.v.bak
cache/src/counter_n_tb.v
cache/src/counter_n_tb.v.bak
cache/sim/work/@_opt
cache/sim/work/cache_controller
cache/sim/work/cache_controller_00_tb
cache/sim/work/cache_controller_hit12_tb
cache/sim/work/cache_controller_miss1_tb
cache/sim/work/cache_controller_miss2_tb
cache/sim/work/cache_controller_tb
cache/sim/work/counter_n
cache/sim/work/counter_n2
cache/sim/work/counter_n_tb_v
cache/sim/work/_temp
cache/sim/work
cache/sim
cache/src
cache
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.