文件名称:LCD_1602
-
所属分类:
- 标签属性:
- 上传时间:2013-03-26
-
文件大小:611.65kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
电子产品世界网站的一个FPGA DIY的一个项目,这个是1602的一个实例源码!-Electronic products world website a FPGA DIY projects, this is an instance of the source of the 1602' s!
(系统自动生成,下载前可以参看下载内容)
下载文件列表
LCD_1602/char_ram.vhd.bak
LCD_1602/db/LCD_1602.(0).cnf.cdb
LCD_1602/db/LCD_1602.(0).cnf.hdb
LCD_1602/db/LCD_1602.amm.cdb
LCD_1602/db/LCD_1602.asm.qmsg
LCD_1602/db/LCD_1602.asm.rdb
LCD_1602/db/LCD_1602.asm_labs.ddb
LCD_1602/db/LCD_1602.cbx.xml
LCD_1602/db/LCD_1602.cmp.bpm
LCD_1602/db/LCD_1602.cmp.cdb
LCD_1602/db/LCD_1602.cmp.hdb
LCD_1602/db/LCD_1602.cmp.kpt
LCD_1602/db/LCD_1602.cmp.logdb
LCD_1602/db/LCD_1602.cmp.rdb
LCD_1602/db/LCD_1602.cmp0.ddb
LCD_1602/db/LCD_1602.cmp1.ddb
LCD_1602/db/LCD_1602.cmp2.ddb
LCD_1602/db/LCD_1602.cmp_merge.kpt
LCD_1602/db/LCD_1602.db_info
LCD_1602/db/LCD_1602.eda.qmsg
LCD_1602/db/LCD_1602.fit.qmsg
LCD_1602/db/LCD_1602.hier_info
LCD_1602/db/LCD_1602.hif
LCD_1602/db/LCD_1602.idb.cdb
LCD_1602/db/LCD_1602.lpc.html
LCD_1602/db/LCD_1602.lpc.rdb
LCD_1602/db/LCD_1602.lpc.txt
LCD_1602/db/LCD_1602.map.bpm
LCD_1602/db/LCD_1602.map.cdb
LCD_1602/db/LCD_1602.map.hdb
LCD_1602/db/LCD_1602.map.kpt
LCD_1602/db/LCD_1602.map.logdb
LCD_1602/db/LCD_1602.map.qmsg
LCD_1602/db/LCD_1602.map_bb.cdb
LCD_1602/db/LCD_1602.map_bb.hdb
LCD_1602/db/LCD_1602.map_bb.logdb
LCD_1602/db/LCD_1602.pre_map.cdb
LCD_1602/db/LCD_1602.pre_map.hdb
LCD_1602/db/LCD_1602.rom0_LCD_1602_e61df955.hdl.mif
LCD_1602/db/LCD_1602.root_partition.map.reg_db.cdb
LCD_1602/db/LCD_1602.rtlv.hdb
LCD_1602/db/LCD_1602.rtlv_sg.cdb
LCD_1602/db/LCD_1602.rtlv_sg_swap.cdb
LCD_1602/db/LCD_1602.sgdiff.cdb
LCD_1602/db/LCD_1602.sgdiff.hdb
LCD_1602/db/LCD_1602.sld_design_entry.sci
LCD_1602/db/LCD_1602.sld_design_entry_dsc.sci
LCD_1602/db/LCD_1602.smart_action.txt
LCD_1602/db/LCD_1602.smp_dump.txt
LCD_1602/db/LCD_1602.sta.qmsg
LCD_1602/db/LCD_1602.sta.rdb
LCD_1602/db/LCD_1602.sta_cmp.8_slow.tdb
LCD_1602/db/LCD_1602.syn_hier_info
LCD_1602/db/LCD_1602.taw.rdb
LCD_1602/db/LCD_1602.tis_db_list.ddb
LCD_1602/db/LCD_1602.tmw_info
LCD_1602/db/logic_util_heursitic.dat
LCD_1602/db/prev_cmp_LCD_1602.qmsg
LCD_1602/incremental_db/compiled_partitions/LCD_1602.db_info
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.dfp
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.kpt
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.logdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.rcfdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.dpi
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.hb_info
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.sig
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.kpt
LCD_1602/incremental_db/README
LCD_1602/LCD_1602.asm.rpt
LCD_1602/LCD_1602.cdf
LCD_1602/LCD_1602.done
LCD_1602/LCD_1602.eda.rpt
LCD_1602/LCD_1602.fit.rpt
LCD_1602/LCD_1602.fit.smsg
LCD_1602/LCD_1602.fit.summary
LCD_1602/LCD_1602.flow.rpt
LCD_1602/LCD_1602.jdi
LCD_1602/LCD_1602.map.rpt
LCD_1602/LCD_1602.map.smsg
LCD_1602/LCD_1602.map.summary
LCD_1602/LCD_1602.pin
LCD_1602/LCD_1602.pof
LCD_1602/LCD_1602.qpf
LCD_1602/LCD_1602.qsf
LCD_1602/LCD_1602.sdc
LCD_1602/LCD_1602.sof
LCD_1602/LCD_1602.sta.rpt
LCD_1602/LCD_1602.sta.summary
LCD_1602/LCD_1602.tcl
LCD_1602/LCD_1602.tcl.bak
LCD_1602/LCD_1602.v
LCD_1602/LCD_1602.v.bak
LCD_1602/LCD_1602_nativelink_simulation.rpt
LCD_1602/simulation/modelsim/LCD_1602.sft
LCD_1602/simulation/modelsim/LCD_1602.vo
LCD_1602/simulation/modelsim/LCD_1602.vt
LCD_1602/simulation/modelsim/LCD_1602.vt.bak
LCD_1602/simulation/modelsim/LCD_1602_fast.vo
LCD_1602/simulation/modelsim/LCD_1602_modelsim.xrf
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak1
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak2
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak3
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak4
LCD_1602/simulation/modelsim/LCD_1602_v.sdo
LCD_1602/simulation/modelsim/LCD_1602_v_fast.sdo
LCD_1602/simulation/modelsim/modelsim.ini
LCD_1602/simulation/modelsim/msim_transcript
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/verilog.prw
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/verilog.psm
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.dat
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.dbs
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.vhd
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/verilog.prw
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/verilog.psm
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/_primary.dat
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst
LCD_1602/db/LCD_1602.(0).cnf.cdb
LCD_1602/db/LCD_1602.(0).cnf.hdb
LCD_1602/db/LCD_1602.amm.cdb
LCD_1602/db/LCD_1602.asm.qmsg
LCD_1602/db/LCD_1602.asm.rdb
LCD_1602/db/LCD_1602.asm_labs.ddb
LCD_1602/db/LCD_1602.cbx.xml
LCD_1602/db/LCD_1602.cmp.bpm
LCD_1602/db/LCD_1602.cmp.cdb
LCD_1602/db/LCD_1602.cmp.hdb
LCD_1602/db/LCD_1602.cmp.kpt
LCD_1602/db/LCD_1602.cmp.logdb
LCD_1602/db/LCD_1602.cmp.rdb
LCD_1602/db/LCD_1602.cmp0.ddb
LCD_1602/db/LCD_1602.cmp1.ddb
LCD_1602/db/LCD_1602.cmp2.ddb
LCD_1602/db/LCD_1602.cmp_merge.kpt
LCD_1602/db/LCD_1602.db_info
LCD_1602/db/LCD_1602.eda.qmsg
LCD_1602/db/LCD_1602.fit.qmsg
LCD_1602/db/LCD_1602.hier_info
LCD_1602/db/LCD_1602.hif
LCD_1602/db/LCD_1602.idb.cdb
LCD_1602/db/LCD_1602.lpc.html
LCD_1602/db/LCD_1602.lpc.rdb
LCD_1602/db/LCD_1602.lpc.txt
LCD_1602/db/LCD_1602.map.bpm
LCD_1602/db/LCD_1602.map.cdb
LCD_1602/db/LCD_1602.map.hdb
LCD_1602/db/LCD_1602.map.kpt
LCD_1602/db/LCD_1602.map.logdb
LCD_1602/db/LCD_1602.map.qmsg
LCD_1602/db/LCD_1602.map_bb.cdb
LCD_1602/db/LCD_1602.map_bb.hdb
LCD_1602/db/LCD_1602.map_bb.logdb
LCD_1602/db/LCD_1602.pre_map.cdb
LCD_1602/db/LCD_1602.pre_map.hdb
LCD_1602/db/LCD_1602.rom0_LCD_1602_e61df955.hdl.mif
LCD_1602/db/LCD_1602.root_partition.map.reg_db.cdb
LCD_1602/db/LCD_1602.rtlv.hdb
LCD_1602/db/LCD_1602.rtlv_sg.cdb
LCD_1602/db/LCD_1602.rtlv_sg_swap.cdb
LCD_1602/db/LCD_1602.sgdiff.cdb
LCD_1602/db/LCD_1602.sgdiff.hdb
LCD_1602/db/LCD_1602.sld_design_entry.sci
LCD_1602/db/LCD_1602.sld_design_entry_dsc.sci
LCD_1602/db/LCD_1602.smart_action.txt
LCD_1602/db/LCD_1602.smp_dump.txt
LCD_1602/db/LCD_1602.sta.qmsg
LCD_1602/db/LCD_1602.sta.rdb
LCD_1602/db/LCD_1602.sta_cmp.8_slow.tdb
LCD_1602/db/LCD_1602.syn_hier_info
LCD_1602/db/LCD_1602.taw.rdb
LCD_1602/db/LCD_1602.tis_db_list.ddb
LCD_1602/db/LCD_1602.tmw_info
LCD_1602/db/logic_util_heursitic.dat
LCD_1602/db/prev_cmp_LCD_1602.qmsg
LCD_1602/incremental_db/compiled_partitions/LCD_1602.db_info
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.dfp
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.kpt
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.logdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.cmp.rcfdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.dpi
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.cdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.hb_info
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hbdb.sig
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.hdb
LCD_1602/incremental_db/compiled_partitions/LCD_1602.root_partition.map.kpt
LCD_1602/incremental_db/README
LCD_1602/LCD_1602.asm.rpt
LCD_1602/LCD_1602.cdf
LCD_1602/LCD_1602.done
LCD_1602/LCD_1602.eda.rpt
LCD_1602/LCD_1602.fit.rpt
LCD_1602/LCD_1602.fit.smsg
LCD_1602/LCD_1602.fit.summary
LCD_1602/LCD_1602.flow.rpt
LCD_1602/LCD_1602.jdi
LCD_1602/LCD_1602.map.rpt
LCD_1602/LCD_1602.map.smsg
LCD_1602/LCD_1602.map.summary
LCD_1602/LCD_1602.pin
LCD_1602/LCD_1602.pof
LCD_1602/LCD_1602.qpf
LCD_1602/LCD_1602.qsf
LCD_1602/LCD_1602.sdc
LCD_1602/LCD_1602.sof
LCD_1602/LCD_1602.sta.rpt
LCD_1602/LCD_1602.sta.summary
LCD_1602/LCD_1602.tcl
LCD_1602/LCD_1602.tcl.bak
LCD_1602/LCD_1602.v
LCD_1602/LCD_1602.v.bak
LCD_1602/LCD_1602_nativelink_simulation.rpt
LCD_1602/simulation/modelsim/LCD_1602.sft
LCD_1602/simulation/modelsim/LCD_1602.vo
LCD_1602/simulation/modelsim/LCD_1602.vt
LCD_1602/simulation/modelsim/LCD_1602.vt.bak
LCD_1602/simulation/modelsim/LCD_1602_fast.vo
LCD_1602/simulation/modelsim/LCD_1602_modelsim.xrf
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak1
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak2
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak3
LCD_1602/simulation/modelsim/LCD_1602_run_msim_rtl_verilog.do.bak4
LCD_1602/simulation/modelsim/LCD_1602_v.sdo
LCD_1602/simulation/modelsim/LCD_1602_v_fast.sdo
LCD_1602/simulation/modelsim/modelsim.ini
LCD_1602/simulation/modelsim/msim_transcript
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/verilog.prw
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/verilog.psm
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.dat
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.dbs
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602/_primary.vhd
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/verilog.prw
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/verilog.psm
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst/_primary.dat
LCD_1602/simulation/modelsim/rtl_work/@l@c@d_1602_vlg_tst
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.