- synchronisation This circuit is a nice edge detector that gives you synchronous notification of edges on your input signal. There s no excuse for not doing this it s a tiny circuit in just five lines of Verilog.
- lda This file implement Lda algorithm for dimension reduction and clustering techniques. Dimension reduction
文件名称:daojishi100s
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本程序是用AVR单片机做100s倒数计时用的，希望跟初学这个参考-This procedure is used the AVR do 100s countdown with the hope that with the beginner this reference
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倒计时100s.c
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