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文件名称:DDS

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  • 上传时间:
    2013-04-20
  • 文件大小:
    3.79mb
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介绍说明--下载内容来自于网络,使用问题请自行百度

首先利用VC6.0程序产生正弦波,三角波ROM数据,并将数据导入FPGA的ROM,利用TLV5618是串行输入的12位高精度快速双口D/A转换器输出。-First using VC6.0 program generate sine wave, triangle wave ROM data, and the data import the ROM of the FPGA, using TLV5618 is high precision and fast duplex serial input 12 D/A converter output.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

DDS/
DDS/DDS.asm.rpt
DDS/DDS.done
DDS/DDS.eda.rpt
DDS/DDS.fit.rpt
DDS/DDS.fit.smsg
DDS/DDS.fit.summary
DDS/DDS.flow.rpt
DDS/DDS.map.rpt
DDS/DDS.map.summary
DDS/DDS.pin
DDS/DDS.qpf
DDS/DDS.qsf
DDS/DDS.sof
DDS/DDS.sta.rpt
DDS/DDS.sta.summary
DDS/DDS.v
DDS/DDS.v.bak
DDS/DDS_nativelink_simulation.rpt
DDS/TLV5618.v
DDS/db/
DDS/db/DDS.(0).cnf.cdb
DDS/db/DDS.(0).cnf.hdb
DDS/db/DDS.(1).cnf.cdb
DDS/db/DDS.(1).cnf.hdb
DDS/db/DDS.(2).cnf.cdb
DDS/db/DDS.(2).cnf.hdb
DDS/db/DDS.(3).cnf.cdb
DDS/db/DDS.(3).cnf.hdb
DDS/db/DDS.(4).cnf.cdb
DDS/db/DDS.(4).cnf.hdb
DDS/db/DDS.amm.cdb
DDS/db/DDS.asm.qmsg
DDS/db/DDS.asm.rdb
DDS/db/DDS.asm_labs.ddb
DDS/db/DDS.cbx.xml
DDS/db/DDS.cmp.bpm
DDS/db/DDS.cmp.cdb
DDS/db/DDS.cmp.hdb
DDS/db/DDS.cmp.kpt
DDS/db/DDS.cmp.logdb
DDS/db/DDS.cmp.rdb
DDS/db/DDS.cmp_merge.kpt
DDS/db/DDS.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
DDS/db/DDS.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
DDS/db/DDS.db_info
DDS/db/DDS.eda.qmsg
DDS/db/DDS.fit.qmsg
DDS/db/DDS.hier_info
DDS/db/DDS.hif
DDS/db/DDS.idb.cdb
DDS/db/DDS.lpc.html
DDS/db/DDS.lpc.rdb
DDS/db/DDS.lpc.txt
DDS/db/DDS.map.bpm
DDS/db/DDS.map.cdb
DDS/db/DDS.map.hdb
DDS/db/DDS.map.kpt
DDS/db/DDS.map.logdb
DDS/db/DDS.map.qmsg
DDS/db/DDS.map_bb.cdb
DDS/db/DDS.map_bb.hdb
DDS/db/DDS.map_bb.logdb
DDS/db/DDS.pre_map.cdb
DDS/db/DDS.pre_map.hdb
DDS/db/DDS.rtlv.hdb
DDS/db/DDS.rtlv_sg.cdb
DDS/db/DDS.rtlv_sg_swap.cdb
DDS/db/DDS.sgdiff.cdb
DDS/db/DDS.sgdiff.hdb
DDS/db/DDS.sld_design_entry.sci
DDS/db/DDS.sld_design_entry_dsc.sci
DDS/db/DDS.smart_action.txt
DDS/db/DDS.sta.qmsg
DDS/db/DDS.sta.rdb
DDS/db/DDS.sta_cmp.8_slow_1200mv_85c.tdb
DDS/db/DDS.syn_hier_info
DDS/db/DDS.tis_db_list.ddb
DDS/db/DDS.tiscmp.fast_1200mv_0c.ddb
DDS/db/DDS.tiscmp.slow_1200mv_0c.ddb
DDS/db/DDS.tiscmp.slow_1200mv_85c.ddb
DDS/db/altsyncram_9e91.tdf
DDS/db/logic_util_heursitic.dat
DDS/db/prev_cmp_DDS.qmsg
DDS/greybox_tmp/
DDS/greybox_tmp/cbx_args.txt
DDS/incremental_db/
DDS/incremental_db/README
DDS/incremental_db/compiled_partitions/
DDS/incremental_db/compiled_partitions/DDS.db_info
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.cbp
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.cdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.dfp
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.hdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.kpt
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.logdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.rcfdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.cmp.re.rcfdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.map.cbp
DDS/incremental_db/compiled_partitions/DDS.root_partition.map.cdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.map.dpi
DDS/incremental_db/compiled_partitions/DDS.root_partition.map.hdb
DDS/incremental_db/compiled_partitions/DDS.root_partition.map.kpt
DDS/rom_data.mif
DDS/rom_data.qip
DDS/rom_data.v
DDS/rom_data_bb.v
DDS/simulation/
DDS/simulation/modelsim/
DDS/simulation/modelsim/DDS.sft
DDS/simulation/modelsim/DDS.vo
DDS/simulation/modelsim/DDS.vt
DDS/simulation/modelsim/DDS.vt.bak
DDS/simulation/modelsim/DDS_8_1200mv_0c_slow.vo
DDS/simulation/modelsim/DDS_8_1200mv_0c_v_slow.sdo
DDS/simulation/modelsim/DDS_8_1200mv_85c_slow.vo
DDS/simulation/modelsim/DDS_8_1200mv_85c_v_slow.sdo
DDS/simulation/modelsim/DDS_8_1200mv_85c_v_slow.sdo_typ.csd
DDS/simulation/modelsim/DDS_min_1200mv_0c_fast.vo
DDS/simulation/modelsim/DDS_min_1200mv_0c_v_fast.sdo
DDS/simulation/modelsim/DDS_modelsim.xrf
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak1
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak10
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak2
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak3
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak4
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak5
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak6
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak7
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak8
DDS/simulation/modelsim/DDS_run_msim_gate_verilog.do.bak9
DDS/simulation/modelsim/DDS_run_msim_rtl_verilog.do
DDS/simulation/modelsim/DDS_v.sdo
DDS/simulation/modelsim/gate_work/
DDS/simulation/modelsim/gate_work/@d@d@s/
DDS/simulation/modelsim/gate_work/@d@d@s/_primary.dat
DDS/simulation/modelsim/gate_work/@d@d@s/_primary.dbs
DDS/simulation/modelsim/gate_work/@d@d@s/_primary.vhd
DDS/simulation/modelsim/gate_work/@d@d@s/verilog.prw
DDS/simulation/modelsim/gate_work/@d@d@s/verilog.psm
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/_primary.dat
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/_primary.dbs
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/_primary.vhd
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/verilog.prw
DDS/simulation/modelsim/gate_work/@d@d@s_vlg_tst/verilog.psm
DDS/simulation/modelsim/gate_work/_info
DDS/simulation/modelsim/gate_work/_temp/
DDS/simulation/models

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