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文件名称:SX

  • 所属分类：
    MPI
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2013-04-24
  • 文件大小：
    868.41kb
  • 已下载：
    0次
  • 提 供 者：
    章****
  • 相关连接：
    无
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修正介绍说明

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基于Proasic3 startkit开发板，描述了8位地址锁存芯片74ls259和Uart接受模块，通过这两个模块来控制开发板上的led.-Based on the the ProASIC3 StartKit development board, describes the 8-bit address latch chip 74LS259 and the UART receiving module, to control development board led by these two modules.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

SX/designer/impl1/designer.log
SX/designer/impl1/designer_genhdl.log
SX/designer/impl1/ls259.adb
SX/designer/impl1/ls259.dtf/verify.log
SX/designer/impl1/ls259.ide_des
SX/designer/impl1/ls259.pdb
SX/designer/impl1/ls259.pdb.depends
SX/designer/impl1/ls259.tcl
SX/designer/impl1/ls259_ba.sdf
SX/designer/impl1/ls259_ba.v
SX/designer/impl1/ls259_fp/$$FlashPro_09003.L$$
SX/designer/impl1/ls259_fp/ls259.log
SX/designer/impl1/ls259_fp/ls259.pro
SX/designer/impl1/ls259_fp/projectData/ls259.pdb
SX/designer/impl1/sx.adb
SX/designer/impl1/sx.dtf/verify.log
SX/designer/impl1/sx.ide_des
SX/designer/impl1/sx.pdb
SX/designer/impl1/sx.pdb.depends
SX/designer/impl1/sx.tcl
SX/designer/impl1/sx_1.adb
SX/designer/impl1/sx_1.dtf/verify.log
SX/designer/impl1/sx_1.ide_des
SX/designer/impl1/sx_1.pdb
SX/designer/impl1/sx_1.pdb.depends
SX/designer/impl1/sx_1_ba.sdf
SX/designer/impl1/sx_1_ba.v
SX/designer/impl1/sx_1_fp/$$FlashPro_09003.L$$
SX/designer/impl1/sx_1_fp/projectData/sx_1.pdb
SX/designer/impl1/sx_1_fp/sx_1.log
SX/designer/impl1/sx_1_fp/sx_1.pro
SX/designer/impl1/sx_ba.sdf
SX/designer/impl1/sx_ba.v
SX/designer/impl1/sx_fp/$$FlashPro_09003.L$$
SX/designer/impl1/sx_fp/projectData/sx.pdb
SX/designer/impl1/sx_fp/sx.log
SX/designer/impl1/sx_fp/sx.pro
SX/hdl/ls259.v
SX/hdl/rec.v
SX/hdl/sx.v
SX/simulation/modelsim.ini
SX/simulation/modelsim.ini.sav
SX/simulation/modelsim.log
SX/simulation/postsynth/ls259/verilog.psm
SX/simulation/postsynth/ls259/_primary.dat
SX/simulation/postsynth/ls259/_primary.dbs
SX/simulation/postsynth/ls259/_primary.vhd
SX/simulation/postsynth/rec/verilog.psm
SX/simulation/postsynth/rec/_primary.dat
SX/simulation/postsynth/rec/_primary.dbs
SX/simulation/postsynth/rec/_primary.vhd
SX/simulation/postsynth/sx/verilog.psm
SX/simulation/postsynth/sx/_primary.dat
SX/simulation/postsynth/sx/_primary.dbs
SX/simulation/postsynth/sx/_primary.vhd
SX/simulation/postsynth/_info
SX/simulation/presynth/ls259/verilog.psm
SX/simulation/presynth/ls259/_primary.dat
SX/simulation/presynth/ls259/_primary.dbs
SX/simulation/presynth/ls259/_primary.vhd
SX/simulation/presynth/rec/verilog.psm
SX/simulation/presynth/rec/_primary.dat
SX/simulation/presynth/rec/_primary.dbs
SX/simulation/presynth/rec/_primary.vhd
SX/simulation/presynth/sx/verilog.psm
SX/simulation/presynth/sx/_primary.dat
SX/simulation/presynth/sx/_primary.dbs
SX/simulation/presynth/sx/_primary.vhd
SX/simulation/presynth/_info
SX/simulation/run.do
SX/simulation/vsim.wlf
SX/simulation/work/ls259/verilog.psm
SX/simulation/work/ls259/_primary.dat
SX/simulation/work/ls259/_primary.dbs
SX/simulation/work/ls259/_primary.vhd
SX/simulation/work/rec/verilog.psm
SX/simulation/work/rec/_primary.dat
SX/simulation/work/rec/_primary.dbs
SX/simulation/work/rec/_primary.vhd
SX/simulation/work/sx/verilog.psm
SX/simulation/work/sx/_primary.dat
SX/simulation/work/sx/_primary.dbs
SX/simulation/work/sx/_primary.vhd
SX/simulation/work/_info
SX/smartgen/smartgen.aws
SX/SX.prj
SX/synthesis/.recordref
SX/synthesis/backup/ls259.srr
SX/synthesis/backup/sx.srr
SX/synthesis/backup/sx_1.srr
SX/synthesis/ls259.areasrr
SX/synthesis/ls259.edn
SX/synthesis/ls259.fse
SX/synthesis/ls259.htm
SX/synthesis/ls259.map
SX/synthesis/ls259.sap
SX/synthesis/ls259.sdf
SX/synthesis/ls259.so
SX/synthesis/ls259.srd
SX/synthesis/ls259.srm
SX/synthesis/ls259.srr
SX/synthesis/ls259.srs
SX/synthesis/ls259.tlg
SX/synthesis/ls259_sdc.sdc
SX/synthesis/ls259_syn.prd
SX/synthesis/ls259_syn.prj
SX/synthesis/ls259_syn.rpt
SX/synthesis/ls259_syn.ta
SX/synthesis/ls259_ta.srm
SX/synthesis/run_options.txt
SX/synthesis/stdout.log
SX/synthesis/sx.areasrr
SX/synthesis/sx.edn
SX/synthesis/sx.fse
SX/synthesis/sx.htm
SX/synthesis/sx.map
SX/synthesis/sx.sap
SX/synthesis/sx.sdf
SX/synthesis/sx.so
SX/synthesis/sx.srd
SX/synthesis/sx.srm
SX/synthesis/sx.srr
SX/synthesis/sx.srs
SX/synthesis/sx.tlg
SX/synthesis/sx.v
SX/synthesis/sx_1.areasrr
SX/synthesis/sx_1.edn
SX/synthesis/sx_1.fse
SX/synthesis/sx_1.htm
SX/synthesis/sx_1.map
SX/synthesis/sx_1.sap
SX/synthesis/sx_1.sdf
SX/synthesis/sx_1.so
SX/synthesis/sx_1.srd
SX/synthesis/sx_1.srm
SX/synthesis/sx_1.srr
SX/synthesis/sx_1.srs
SX/synthesis/sx_1.tlg
SX/synthesis/sx_1_sdc.sdc
SX/synthesis/sx_sdc.sdc
SX/synthesis/sx_syn.prd
SX/synthesis/sx_syn.prj
SX/synthesis/syntmp/ls259.msg
SX/synthesis/syntmp/ls259.plg
SX/synthesis/syntmp/ls259_flink.htm
SX/synthesis/syntmp/ls259_srr.htm
SX/synthesis/syntmp/ls259_toc.htm
SX/synthesis/syntmp/sap.log
SX/synthesis/syntmp/sx.msg
SX/synthesis/syntmp/sx.plg
SX/synthesis/syntmp/sx_1.msg
SX/synthesis/syntmp/sx_1.plg
SX/synthesis/syntmp/sx_1_flink.htm
SX/synthesis/syntmp/sx_1_srr.htm
SX/synthesis/syntmp/sx_1_toc.htm
SX/synthesis/syntmp/sx_flink.htm
SX/synthesis/syntmp/sx_srr.htm
SX/synthesis/syntmp/sx_toc.htm
SX/synthesis/traplog.tlg
SX/viewdraw/vf/project.lst
SX/viewdraw/viewdraw.ini
SX/designer/impl1/ls259_fp/projectData
SX/designer/impl1/sx_1_fp/projectData
SX/designer/impl1/sx_fp/projectData
SX/designer/impl1/ls259.dtf
SX/designer/impl1/ls259_fp
SX/designer/impl1/simulation
SX/designer/impl1/sx.dtf
SX/designer/impl1/sx_1.dtf
SX/designer/impl1/sx_1_fp
SX/designer/impl1/sx_fp
SX/simul

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