netmagicmini-example/assignment_defaults.qdf
netmagicmini-example/cdp/asyn_256_139.qip
netmagicmini-example/cdp/asyn_256_139.v
netmagicmini-example/cdp/asyn_256_139_bb.v
netmagicmini-example/cdp/asyn_64_1.qip
netmagicmini-example/cdp/asyn_64_1.v
netmagicmini-example/cdp/asyn_64_1_bb.v
netmagicmini-example/cdp/check_100_1000.v
netmagicmini-example/cdp/check_fifo.v
netmagicmini-example/cdp/crc_check.v
netmagicmini-example/cdp/crc_check_altcrc.v
netmagicmini-example/cdp/ddio_in_1.v
netmagicmini-example/cdp/ddio_in_4.v
netmagicmini-example/cdp/ddio_out.v
netmagicmini-example/cdp/ddio_out_1.v
netmagicmini-example/cdp/gmii_139_1000.v
netmagicmini-example/cdp/gmii_139_1000.v.bak
netmagicmini-example/cdp/greybox_tmp/cbx_args.txt
netmagicmini-example/cdp/input2output_128_139.v
netmagicmini-example/cdp/input_ctrl.v
netmagicmini-example/cdp/input_ctrl.v.bak
netmagicmini-example/cdp/level2_256_139.qip
netmagicmini-example/cdp/level2_256_139.v
netmagicmini-example/cdp/level2_64_19.v
netmagicmini-example/cdp/output_ctrl.v
netmagicmini-example/cdp/output_ctrl.v.bak
netmagicmini-example/cdp/rgmii_gmii.v
netmagicmini-example/cdp/rule_32_30.qip
netmagicmini-example/cdp/rule_32_30.v
netmagicmini-example/cdp/rule_32_30.v.bak
netmagicmini-example/cdp/rule_32_30_bb.v
netmagicmini-example/cdp/rule_32_30_fifo.qip
netmagicmini-example/cdp/rule_32_30_fifo.v
netmagicmini-example/cdp/rx_64_1.qip
netmagicmini-example/cdp/rx_64_1.v
netmagicmini-example/cdp/rx_crc.v
netmagicmini-example/cdp/rx_crc.v.bak
netmagicmini-example/cdp/rx_tx_1000.v
netmagicmini-example/cdp/rx_tx_1000.v.bak
netmagicmini-example/cdp/tx139_gmii_1000.v
netmagicmini-example/cdp/tx139_gmii_1000.v.bak
netmagicmini-example/cdp/tx_gen.v
netmagicmini-example/cdp/tx_gen.v.bak
netmagicmini-example/ddr2/altera_avalon_half_rate_bridge.v
netmagicmini-example/ddr2/altera_avalon_half_rate_bridge_constraints.sdc
netmagicmini-example/ddr2/altmemphy-library/auk_ddr_hp_controller.ocp
netmagicmini-example/ddr2/alt_ddrx_addr_cmd.v
netmagicmini-example/ddr2/alt_ddrx_afi_block.v
netmagicmini-example/ddr2/alt_ddrx_avalon_if.v
netmagicmini-example/ddr2/alt_ddrx_bank_timer.v
netmagicmini-example/ddr2/alt_ddrx_bank_timer_info.v
netmagicmini-example/ddr2/alt_ddrx_bank_timer_wrapper.v
netmagicmini-example/ddr2/alt_ddrx_bypass.v
netmagicmini-example/ddr2/alt_ddrx_cache.v
netmagicmini-example/ddr2/alt_ddrx_clock_and_reset.v
netmagicmini-example/ddr2/alt_ddrx_cmd_gen.v
netmagicmini-example/ddr2/alt_ddrx_cmd_queue.v
netmagicmini-example/ddr2/alt_ddrx_controller.v
netmagicmini-example/ddr2/alt_ddrx_csr.v
netmagicmini-example/ddr2/alt_ddrx_ddr2_odt_gen.v
netmagicmini-example/ddr2/alt_ddrx_ddr3_odt_gen.v
netmagicmini-example/ddr2/alt_ddrx_decoder.v
netmagicmini-example/ddr2/alt_ddrx_decoder_40.v
netmagicmini-example/ddr2/alt_ddrx_decoder_72.v
netmagicmini-example/ddr2/alt_ddrx_ecc.v
netmagicmini-example/ddr2/alt_ddrx_encoder.v
netmagicmini-example/ddr2/alt_ddrx_encoder_40.v
netmagicmini-example/ddr2/alt_ddrx_encoder_72.v
netmagicmini-example/ddr2/alt_ddrx_input_if.v
netmagicmini-example/ddr2/alt_ddrx_odt_gen.v
netmagicmini-example/ddr2/alt_ddrx_rank_monitor.v
netmagicmini-example/ddr2/alt_ddrx_state_machine.v
netmagicmini-example/ddr2/alt_ddrx_timing_param.v
netmagicmini-example/ddr2/alt_ddrx_wdata_fifo.v
netmagicmini-example/ddr2/alt_mem_phy_defines.v
netmagicmini-example/ddr2/ddr2.bsf
netmagicmini-example/ddr2/ddr2.html
netmagicmini-example/ddr2/ddr2.qip
netmagicmini-example/ddr2/ddr2.v
netmagicmini-example/ddr2/ddr2_advisor.ipa
netmagicmini-example/ddr2/ddr2_alt_ddrx_controller_wrapper.v
netmagicmini-example/ddr2/ddr2_bb.v
netmagicmini-example/ddr2/ddr2_controller_phy.v
netmagicmini-example/ddr2/ddr2_example_driver.v
netmagicmini-example/ddr2/ddr2_example_top.sdc
netmagicmini-example/ddr2/ddr2_example_top.v
netmagicmini-example/ddr2/ddr2_ex_lfsr8.v
netmagicmini-example/ddr2/ddr2_high_performance_controller-library/auk_ddr_hp_controller.ocp
netmagicmini-example/ddr2/ddr2_phy.bsf
netmagicmini-example/ddr2/ddr2_phy.html
netmagicmini-example/ddr2/ddr2_phy.qip
netmagicmini-example/ddr2/ddr2_phy.v
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy.v
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy.v.bak
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_dq_dqs.v
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_pll.qip
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_pll.v
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_pll_bb.v
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_seq.vhd
netmagicmini-example/ddr2/ddr2_phy_alt_mem_phy_seq_wrapper.v
netmagicmini-example/ddr2/ddr2_phy_bb.v
netmagicmini-example/ddr2/ddr2_phy_ddr_pins.tcl
netmagicmini-example/ddr2/ddr2_phy_ddr_timing.sdc
netmagicmini-example/ddr2/ddr2_phy_ddr_timing.tcl
netmagicmini-example/ddr2/ddr2_phy_report_timing.tcl
netmagicmini-example/ddr2/ddr2_phy_report_timing_core.tcl
netmagicmini-example/ddr2/ddr2_pin_assignments.tcl
netmagicmini-example/ddr2/testbench/ddr2_example_top_tb.v
netmagicmini-example/ddr2/testbench/ddr2_full_mem_model.v
netmagicmini-example/ddr2/testbench/ddr2_mem_model.v
netmagicmini-example/ddr2_ctrl_module/ddr2um_fifo.v
netmagicmini-example/ddr2_ctrl_mo