文件名称:digonghao
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摘 要 介绍了VLIW密码微处理器的多种低功耗设计方法。根据CMOS电路的能耗机制,对VLIW密码微处理器进行功耗分析。针对分析结果,运用门控时钟、指令前缀压缩、存储器分块访问和操作数隔离等低功耗技术,对VLIW密码微处理器功耗进行优化。基于SMIC的65nm工艺库和功耗分析工具PTPX进行功耗分析,实验结果表明,本文采用的低功耗方法能够有效降低VLIW密码微处理器的功耗。-The summary of several low-power design method of the the VLIW password microprocessor. According to the mechanism of the energy consumption of the CMOS circuit, the the VLIW password microprocessor power analysis. For the results of the analysis, the use of clock gating, instruction prefix compression, memory sub block access and operand isolation low power technology, to optimize the the VLIW password microprocessor power consumption. Based on SMIC the 65nm process libraries and power analysis tools PTPX power analysis, experimental results show that low-power method used in this paper can effectively reduce the power consumption of VLIW password microprocessor.
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密码微处理器低功耗设计.doc
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