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文件名称:jiaotongdeng

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  • 上传时间:
    2013-05-15
  • 文件大小:
    2.79mb
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介绍说明--下载内容来自于网络,使用问题请自行百度

数字电路课程设计。交通灯,主要能实现直行、右行、左行的红绿灯功能。-Digital circuit design courses. Traffic lights, straight, right, left line of traffic lights function.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_PROJECT3.PRJFPG
FPGA_PROJECT3.PRJFPGStructure
FPGA_PROJECT3.SO
History/
History/FPGA_PROJECT3.~(1).SO.Zip
History/FPGA_PROJECT3.~(10).PRJFPG.Zip
History/FPGA_PROJECT3.~(11).PRJFPG.Zip
History/FPGA_PROJECT3.~(12).PRJFPG.Zip
History/FPGA_PROJECT3.~(13).PRJFPG.Zip
History/FPGA_PROJECT3.~(14).PRJFPG.Zip
History/FPGA_PROJECT3.~(15).PRJFPG.Zip
History/FPGA_PROJECT3.~(2).SO.Zip
History/FPGA_PROJECT3.~(3).SO.Zip
History/FPGA_PROJECT3.~(4).PRJFPG.Zip
History/FPGA_PROJECT3.~(4).SO.Zip
History/FPGA_PROJECT3.~(5).PRJFPG.Zip
History/FPGA_PROJECT3.~(5).SO.Zip
History/FPGA_PROJECT3.~(6).PRJFPG.Zip
History/FPGA_PROJECT3.~(6).SO.Zip
History/FPGA_PROJECT3.~(7).PRJFPG.Zip
History/FPGA_PROJECT3.~(8).PRJFPG.Zip
History/FPGA_PROJECT3.~(9).PRJFPG.Zip
History/FPGA_Project3.~(1).PrjFpg.Zip
History/FPGA_Project3.~(2).PrjFpg.Zip
History/FPGA_Project3.~(3).PrjFpg.Zip
History/JIAODONGDENG.~(1).PrjFpg.Zip
History/JIAODONGDENG.~(1).SO.Zip
History/JIAODONGDENG.~(10).PRJFPG.Zip
History/JIAODONGDENG.~(11).PRJFPG.Zip
History/JIAODONGDENG.~(12).PRJFPG.Zip
History/JIAODONGDENG.~(13).PRJFPG.Zip
History/JIAODONGDENG.~(14).PRJFPG.Zip
History/JIAODONGDENG.~(15).PRJFPG.Zip
History/JIAODONGDENG.~(16).PRJFPG.Zip
History/JIAODONGDENG.~(17).PRJFPG.Zip
History/JIAODONGDENG.~(18).PRJFPG.Zip
History/JIAODONGDENG.~(19).PRJFPG.Zip
History/JIAODONGDENG.~(2).PrjFpg.Zip
History/JIAODONGDENG.~(2).SO.Zip
History/JIAODONGDENG.~(3).PrjFpg.Zip
History/JIAODONGDENG.~(3).SO.Zip
History/JIAODONGDENG.~(4).PrjFpg.Zip
History/JIAODONGDENG.~(4).SO.Zip
History/JIAODONGDENG.~(5).PrjFpg.Zip
History/JIAODONGDENG.~(5).SO.Zip
History/JIAODONGDENG.~(6).PrjFpg.Zip
History/JIAODONGDENG.~(6).SO.Zip
History/JIAODONGDENG.~(7).PrjFpg.Zip
History/JIAODONGDENG.~(7).SO.Zip
History/JIAODONGDENG.~(8).PrjFpg.Zip
History/JIAODONGDENG.~(8).SO.Zip
History/JIAODONGDENG.~(9).PrjFpg.Zip
History/JIAODONGDENG.~(9).SO.Zip
History/JIAOTONGDENG.~(1).vhd.Zip
History/JIAOTONGDENG.~(10).vhd.Zip
History/JIAOTONGDENG.~(11).vhd.Zip
History/JIAOTONGDENG.~(12).vhd.Zip
History/JIAOTONGDENG.~(13).vhd.Zip
History/JIAOTONGDENG.~(14).vhd.Zip
History/JIAOTONGDENG.~(15).vhd.Zip
History/JIAOTONGDENG.~(16).vhd.Zip
History/JIAOTONGDENG.~(2).vhd.Zip
History/JIAOTONGDENG.~(3).vhd.Zip
History/JIAOTONGDENG.~(4).vhd.Zip
History/JIAOTONGDENG.~(5).vhd.Zip
History/JIAOTONGDENG.~(6).vhd.Zip
History/JIAOTONGDENG.~(7).vhd.Zip
History/JIAOTONGDENG.~(8).vhd.Zip
History/JIAOTONGDENG.~(9).vhd.Zip
History/SHEET1.~(26).SCHDOC.Zip
History/Sheet1.~(1).SchDoc.Zip
History/Sheet1.~(10).SchDoc.Zip
History/Sheet1.~(11).SchDoc.Zip
History/Sheet1.~(12).SchDoc.Zip
History/Sheet1.~(13).SchDoc.Zip
History/Sheet1.~(14).SchDoc.Zip
History/Sheet1.~(15).SchDoc.Zip
History/Sheet1.~(16).SchDoc.Zip
History/Sheet1.~(17).SchDoc.Zip
History/Sheet1.~(18).SchDoc.Zip
History/Sheet1.~(19).SchDoc.Zip
History/Sheet1.~(2).SchDoc.Zip
History/Sheet1.~(20).SchDoc.Zip
History/Sheet1.~(21).SchDoc.Zip
History/Sheet1.~(22).SchDoc.Zip
History/Sheet1.~(23).SchDoc.Zip
History/Sheet1.~(24).SchDoc.Zip
History/Sheet1.~(25).SchDoc.Zip
History/Sheet1.~(3).SchDoc.Zip
History/Sheet1.~(4).SchDoc.Zip
History/Sheet1.~(5).SchDoc.Zip
History/Sheet1.~(6).SchDoc.Zip
History/Sheet1.~(7).SchDoc.Zip
History/Sheet1.~(8).SchDoc.Zip
History/Sheet1.~(9).SchDoc.Zip
History/Test_ct60.~(1).VHDTST.Zip
History/Test_ct60.~(2).VHDTST.Zip
History/Test_jiaotongdeng.~(1).VHDTST.Zip
History/Test_jiaotongdeng.~(2).VHDTST.Zip
History/Test_jiaotongdeng.~(3).VHDTST.Zip
History/Test_jiaotongdeng.~(4).VHDTST.Zip
History/Test_jiaotongdeng.~(5).VHDTST.Zip
History/Test_jiaotongdeng.~(6).VHDTST.Zip
History/VHDL1.~(1).Vhd.Zip
History/VHDL2.~(1).Vhd.Zip
History/VHDL2.~(2).Vhd.Zip
History/VHDL3.~(1).Vhd.Zip
History/VHDL3.~(10).Vhd.Zip
History/VHDL3.~(11).Vhd.Zip
History/VHDL3.~(12).Vhd.Zip
History/VHDL3.~(13).Vhd.Zip
History/VHDL3.~(14).Vhd.Zip
History/VHDL3.~(2).Vhd.Zip
History/VHDL3.~(3).Vhd.Zip
History/VHDL3.~(4).Vhd.Zip
History/VHDL3.~(5).Vhd.Zip
History/VHDL3.~(6).Vhd.Zip
History/VHDL3.~(7).Vhd.Zip
History/VHDL3.~(8).Vhd.Zip
History/VHDL3.~(9).Vhd.Zip
JIAODONGDENG.PRJFPG
JIAODONGDENG.PrjFpgStructure
JIAODONGDENG.SO
JIAOTONGDENG.vhd
ProjectOutputs/
ProjectOutputs/$$temp0.vhd
ProjectOutputs/Default - All Constraints/
ProjectOutputs/Default - All Constraints/CDIV256DC50.EDN
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.FlwCmp
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.bfl
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.edf
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.mof
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.mpf
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.npl
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.ucf
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.~.bit
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.~.ncd
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3.~.ngd
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3_BUILD.UCF
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3_CoreGen.txt
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3_Synth.log
ProjectOutputs/Default - All Constraints/FPGA_PROJECT3_cclk.~.bit
ProjectOu

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