《Xilinx ISE 9.X FPGA/CPLD设计指南》以FPGA/CPLD设计流程为主线，详细阐述了ISE集成开发环境的使用，并提供了多个示例进行说明。书中在介绍FPGA/CPLD概念和设计流程的基础上，依次论述了工程管理与设计输入、仿真、综合、约束、实现与布局布线、配置调试等在ISE集成环境中的实现方法和技巧。《Xilinx ISE 9.X FPGA/CPLD设计指南》结合作者多年工作经验，立足于工程实践，选用大量典型实例，并配有一定数量的练习题。随书配套光盘收录了所有实例的完整工程目录、源代码、详细操作步骤和使用说明，便于读者边学边练，提高实际应用能力。

-" Xilinx ISE 9.X FPGA/CPLD Design Guide to FPGA/CPLD design process as the main line, elaborated on the use of ISE Integrated Development Environment, and provides several examples will be described. Book on the basis of the introduction FPGA/CPLD concept and design process, in turn discussed the project management and design entry, simulation, synthesis, constraints, and layout, configuration, debugging and other implementation methods and techniques in the ISE integrated environment. The Xilinx ISE 9.X FPGA/CPLD Design Guidelines combination of years of work experience, based on the engineering practice, the choice of a large number of typical examples and exercises with a number of. Supporting CD-ROM with the book collection of all instances of the complete project directory, source code, detailed steps and instructions for use, easy to readers to learn while practicing, improve the ability of practical application.