文件名称:8051-IP
-
所属分类:
- 标签属性:
- 上传时间:2013-05-24
-
文件大小:239.94kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
The synchronous 8051 microcontroller is a common processor found in many
embedded systems. By using asynchronous design techniques, the performance of the
8051 microcontroller is increased. Through simulation and the use of existing
synchronous design tools in the asynchronous design flow, a four-phase handshaking
approach with a stoppable clock is simulated and then implemented. The asynchronous
architecture added to the existing synchronous architecture includes an ALU wrapper, a
controller wrapper, and a clocking element. The asynchronous design flow consists of
functional simulation, synthesis of synchronous blocks, timing analysis, asynchronous
wrapper design, and timing simulation. After implementation analysis, the asynchronous
8051 is 28.7 faster then the synchronous 8051 while only using 10 more area.-The synchronous 8051 microcontroller is a common processor found in many
embedded systems. By using asynchronous design techniques, the performance of the
8051 microcontroller is increased. Through simulation and the use of existing
synchronous design tools in the asynchronous design flow, a four-phase handshaking
approach with a stoppable clock is simulated and then implemented. The asynchronous
architecture added to the existing synchronous architecture includes an ALU wrapper, a
controller wrapper, and a clocking element. The asynchronous design flow consists of
functional simulation, synthesis of synchronous blocks, timing analysis, asynchronous
wrapper design, and timing simulation. After implementation analysis, the asynchronous
8051 is 28.7 faster then the synchronous 8051 while only using 10 more area.
embedded systems. By using asynchronous design techniques, the performance of the
8051 microcontroller is increased. Through simulation and the use of existing
synchronous design tools in the asynchronous design flow, a four-phase handshaking
approach with a stoppable clock is simulated and then implemented. The asynchronous
architecture added to the existing synchronous architecture includes an ALU wrapper, a
controller wrapper, and a clocking element. The asynchronous design flow consists of
functional simulation, synthesis of synchronous blocks, timing analysis, asynchronous
wrapper design, and timing simulation. After implementation analysis, the asynchronous
8051 is 28.7 faster then the synchronous 8051 while only using 10 more area.-The synchronous 8051 microcontroller is a common processor found in many
embedded systems. By using asynchronous design techniques, the performance of the
8051 microcontroller is increased. Through simulation and the use of existing
synchronous design tools in the asynchronous design flow, a four-phase handshaking
approach with a stoppable clock is simulated and then implemented. The asynchronous
architecture added to the existing synchronous architecture includes an ALU wrapper, a
controller wrapper, and a clocking element. The asynchronous design flow consists of
functional simulation, synthesis of synchronous blocks, timing analysis, asynchronous
wrapper design, and timing simulation. After implementation analysis, the asynchronous
8051 is 28.7 faster then the synchronous 8051 while only using 10 more area.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
i8051_all.vhd
i8051_alu.vhd
i8051_ctr.vhd
i8051_dbg.vhd
i8051_dec.vhd
i8051_lib.vhd
i8051_ram.vhd
i8051_report.pdf
i8051_rom.vhd
i8051_tsb.vhd
i8051_xrm.vhd
i8051_alu.vhd
i8051_ctr.vhd
i8051_dbg.vhd
i8051_dec.vhd
i8051_lib.vhd
i8051_ram.vhd
i8051_report.pdf
i8051_rom.vhd
i8051_tsb.vhd
i8051_xrm.vhd
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.