文件名称:adder
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通过Verlog编程，实现一个同步二十四进制计数器，要求有1个异步清零端、1个时钟脉冲输入
-By Verlog programming, to achieve a synchronous binary counter twenty-four, requires an asynchronous clear terminal, a clock pulse input
-By Verlog programming, to achieve a synchronous binary counter twenty-four, requires an asynchronous clear terminal, a clock pulse input
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下载文件列表
adder/
adder/adder.cr.mti
adder/adder.mpf
adder/adder16.v
adder/run.tcl
adder/tb_adder16.v
adder/vsim.wlf
adder/wave.do
adder/work/
adder/work/_info
adder/work/_opt/
adder/work/_opt/_deps
adder/work/_opt/work__info
adder/work/_opt/work_adder16_fast.asm
adder/work/_opt/work_adder16_fast.dt2
adder/work/_opt/work_tb_adder16_fast.asm
adder/work/_opt/work_tb_adder16_fast.dt2
adder/work/_temp/
adder/work/adder16/
adder/work/adder16/_primary.dat
adder/work/adder16/_primary.vhd
adder/work/tb_adder16/
adder/work/tb_adder16/_primary.dat
adder/work/tb_adder16/_primary.vhd
adder/adder.cr.mti
adder/adder.mpf
adder/adder16.v
adder/run.tcl
adder/tb_adder16.v
adder/vsim.wlf
adder/wave.do
adder/work/
adder/work/_info
adder/work/_opt/
adder/work/_opt/_deps
adder/work/_opt/work__info
adder/work/_opt/work_adder16_fast.asm
adder/work/_opt/work_adder16_fast.dt2
adder/work/_opt/work_tb_adder16_fast.asm
adder/work/_opt/work_tb_adder16_fast.dt2
adder/work/_temp/
adder/work/adder16/
adder/work/adder16/_primary.dat
adder/work/adder16/_primary.vhd
adder/work/tb_adder16/
adder/work/tb_adder16/_primary.dat
adder/work/tb_adder16/_primary.vhd
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